Hello,
I have a VerilogA model that is working well in Spectre/APS.  How I'm trying to simulate the design with Cadence AMS and get an error during the elaboration stage:
Quote:


This a cell with some RLC components instantiated and in the code I'm trying to sens the current through one terminal.  In the verilogA code this line uses the following syntax:
  B = I(mp,mp) / area;

I tried naming this branch explicitly, but it does not help.
Any idea how I can work around this?

Thanks a lot in advance!

Misha

Thank you for the suggestion.  It does work. But the problem turned out to be slightly different.  In a different location of the code I had the same line with an addition originating from the ahdllib code that I used as a base for my model:
Quote:


I guess it's a bug - the AMS simulator takes the first syntax but it actually is compliant with the second, same as the good old Spectre.  I guess the Cadence's ahdllib was never QC'd with AMS simulator.  Watch out for that VAMS_ENABLE macro .

Thanks anyway for the advice,
Misha
Thanks