Hi, I'm trying to simulate a PLL in spectre in IC 5.1.41. I've made a PFD and CP with transistors and using them with a veriloga VCO block.

The PFD I made can detect error if time difference between the positive edges of VCO and reference is more than about 140ps. I've measured that using two vpulse for vco and ref. But when I try to use the veriloga block for vco, I've found that spectre uses bigger timesteps and can't detect time difference between vco and ref properly. Things work fine if I decrease the maxstep to about 100ps, but the simulation time becomes too long.

Is there any other efficient way? Please, help.

Thanks in advance.

PS. the veriloga code is below:

module vco3 (ctrl, out);

     inout ctrl, out;
     electrical ctrl, out;
     
     parameter real hi = 1.0;
     parameter real K = -1.8e6/12314;
     parameter real ctrl_nom = 0.500;
     parameter real f_nom = 32000;
     parameter integer points_per_T = 100000 from [10:inf);
     parameter real tr = 15e-12 from [0:inf);
     parameter real tf = 15e-12 from [0:inf);
     parameter real step = 100e-15 from [0:inf);
     
     real phase, f, n, c, c0;
     
     analog begin
           
           @(initial_step) n = 0;
           
           c0 = V(ctrl);
           c = c0 - ctrl_nom;
           f = f_nom + K * c;
//            $strobe ("c0 = %e", c0);
//            $strobe ("c = %e", c);
//            $strobe ("f = %e", f);
           
           $bound_step (1.0 / (points_per_T * f));
           
           phase = idtmod (f, 0, 1);
           n = (phase > 0.5) && (phase <= 1);
           
           V(out) <+ transition (n?hi:0, 0, tr, tf, step);
           
     end

endmodule

Dan Clement wrote on Sep 10^th, 2010, 6:13pm:


I am using bound_step. I thought bound_step is a way of specifying maxstep in veriloga, am i right? I get better results if I make either bound_step or maxstep pretty small. but it makes simulation too time-consuming. Is there any other efficient way?

could you explain a bit about that periodic timer? maybe a code as an example. I'm sorry I'm not that good in veriloga, just started to learn.

Is there any way to reduce maxstep just when an edge occurs in the vco and ref and make spectre take bigger steps on other times?

Thanks.

I've used these two setups.

1) The pfd with both vco and ref from two vpulse - one with 32kHz, the other with 32.001kHz, both starting at 0. The first positive edge of vco leads that of ref by 488.3ps. This difference shows up in the graph and pfd gives a down pulse. Every time difference in according edges thus shows up in the graph. Output log is below:

Important parameter values:
   start = 0 s
   outputstart = 0 s
   stop = 200 us
   step = 200 ns
   maxstep = 2 us
   ic = all
   skipdc = no
   reltol = 10e-06
   abstol(I) = 1 pA
   abstol(V) = 1 uV
   temp = 27 C
   tnom = 27 C
   tempeffects = all
   errpreset = conservative
   method = gear2only
   lteratio = 10
   relref = alllocal
   cmin = 0 F
   gmin = 10e-51 S
   maxrsd = 0 Ohm
   mos_method = s
   mos_vres = 50 mV

   tran: time = 5.761 us    (2.88 %), step = 765.2 ns     (383 m%)
   tran: time = 15.62 us    (7.81 %), step = 930.2 ns     (465 m%)
   tran: time = 25.56 us    (12.8 %), step = 753.7 ns     (377 m%)
   tran: time = 36.14 us    (18.1 %), step = 1.907 us     (953 m%)
   tran: time = 45.51 us    (22.8 %), step = 1.365 us     (682 m%)
   tran: time = 55.39 us    (27.7 %), step = 683.2 ns     (342 m%)
   tran: time = 65.66 us    (32.8 %), step = 991.6 ns     (496 m%)
   tran: time = 75.68 us    (37.8 %), step = 2 us            (1 %)
   tran: time = 85.14 us    (42.6 %), step = 509.8 ns     (255 m%)
   tran: time = 95.03 us    (47.5 %), step = 210 ns       (105 m%)
   tran: time = 106.1 us    (53.1 %), step = 1.764 us     (882 m%)
   tran: time = 115.3 us    (57.7 %), step = 416.3 ns     (208 m%)
   tran: time = 125 us      (62.5 %), step = 338.3 ps     (169 u%)
   tran: time = 135.6 us    (67.8 %), step = 1.414 us     (707 m%)
   tran: time = 145.2 us    (72.6 %), step = 338.2 ns     (169 m%)
   tran: time = 155.6 us    (77.8 %), step = 660.2 ns     (330 m%)
   tran: time = 165.8 us    (82.9 %), step = 1.201 us     (601 m%)
   tran: time = 175.1 us    (87.5 %), step = 249.3 ns     (125 m%)
   tran: time = 185.4 us    (92.7 %), step = 553.7 ns     (277 m%)
   tran: time = 195.3 us    (97.6 %), step = 1 us         (500 m%)

2) This time the ref is vpulse with 32kHz and the veriloga block for vco set with 493.16mV control voltage to give 32.001kHz. I've checked the value of f with $strobe. But, in this case, if bound_step is set to 1000, time step is always 31.25ns. In this case, the first 23 pulses of vco and vref are perfectly aligned and the 24th pulses show up with vco leading ref by 22.47ns and pfd gives the first down down pulse here. The output log is below:

Important parameter values:
   start = 0 s
   outputstart = 0 s
   stop = 1 ms
   step = 1 us
   maxstep = 10 us
   ic = all
   skipdc = no
   reltol = 10e-06
   abstol(I) = 1 pA
   abstol(V) = 1 uV
   temp = 27 C
   tnom = 27 C
   tempeffects = all
   errpreset = conservative
   method = gear2only
   lteratio = 10
   relref = alllocal
   cmin = 0 F
   gmin = 10e-51 S
   maxrsd = 0 Ohm
   mos_method = s
   mos_vres = 50 mV

   tran: time = 25.02 us     (2.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 75.02 us     (7.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 125 us      (12.5 %), step = 22.39 ns    (2.24 m%)
   tran: time = 175 us      (17.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 225 us      (22.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 275 us      (27.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 325 us      (32.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 375 us      (37.5 %), step = 22.39 ns    (2.24 m%)
   tran: time = 425 us      (42.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 475 us      (47.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 525 us      (52.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 575 us      (57.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 625 us      (62.5 %), step = 22.39 ns    (2.24 m%)
   tran: time = 675 us      (67.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 725 us      (72.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 775 us      (77.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 825 us      (82.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 875 us      (87.5 %), step = 1.559 ns     (156 u%)
   tran: time = 925 us      (92.5 %), step = 31.25 ns    (3.12 m%)
   tran: time = 975 us      (97.5 %), step = 31.25 ns    (3.12 m%)

The only default value in the options I've changed is gmin, otherwise the control voltage was very slowly dropping.

If I use bound_step as big as 100000 (step becomes 312.5ps), only then I get accurate results. I guess I'm missing something about bound_step. I understand that it controls maxstep in simulation. But why is step always equal to bound_step?

Should I decrease rel_tol? I've tried with 1e-12, didn't work.

I also used the time_tol parameter in "transition", didn't work.

Thank you so much for the advice! It worked! Thanks!

http://www.designers-guide.org/Analysis/hidden-state.pdf