Somisetty,

  It would help if you provide more information when you asked a
question since the details of your design impact the response. For
example, do you have an external Sample and Hold or are you using
the Capacitor DAC to sample the input? The general procedure for
analyzing noise in switched capacitor circuits is covered in,

  http://www.designers-guide.org/analysis/sc-filters.pdf

                                                      Best Regards,

                                                         Sheldon

Note: I know that in general a SARADC does not require an external
        Sample and Hold, however, parallel SARADC should have one.