cmos.analogvala
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Posts: 65
India
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I have received one LEF file from foundry. I need to import it and see the layout of the circuit using ICFB. When I imported the LEF file with stremout.map file given by the foundry, I did not see any layer or polygon in the layout file. The layout appeared empty. I had used the display.drf file the same as given by foundry. The format of streamout.map is as given below.
via via 47 0 metal1 net 46 0
I do not understand why layout appears empty despite the stop layer is set to 32 in Virtuso..
Please suggest a way to be able to import the LEF file correctly into layout.
Thanks -CA
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