Zorro wrote on Mar 31st, 2011, 3:08am:thanks for the reply boe,
in both the timer event statements inside conditional statements are allowed. May I ask what simulator do you use?
Cadence NCSim: Cadence Verilog-AMS Reference (June 2010) states "do not use the timer function inside conditional statements."
Quote:then I don't know if the problem is the code itself or the simulator.
NCSim does not seem to support your code (see above).
Quote:I don't know exactly how to limit this new parameter <timeTol>. (Designer's Guide to VerilogAMS, page 206)
<timeTol> is the timing error for an edge you consider negligible.
Quote:ummm... does it mean that it is not possible to, let's say "reset" the start of the timer function?
It should be possible. I expect NCSim to test if abs($abstime - (startTime+k*period) ) < timeTol, k non-negative integer. Cadence: "The simulator ... generates events at each multiple of period after start_time."
Quote:if you have any suggestion please let me know.
For Cadence NCSim, place if statement inside timer event block. If this does not help, you could try to use a non-periodical timer event.
B O E