try to model a digital code shifter in verilogA. It got syntax error.
"result[0:<<--? 7] = {1 0 0 1 1 1 0 1};"

Looks like I could not define the content of the array.

       integer result[0:7] ;

       analog begin
               @( initial_step) begin
                       result[0:7] = {1, 0, 0, 1, 1, 1, 0, 1};
               end

               @( cross( V(clk)-vth, 1)) begin
                       temp = result[i];
                       i = i + 1;
                       if( i >=8)
                               i=0;
               end

I am aware of doing that. Is there a better way?
Because i need to create a long patterns for different cases.

That shift register is to do a simple test case only

seems like i got to assign the bit one by one.