I am running an ams simulation on a decimation filter. Right now, the only analog components are pulse sources used to drive the filter and  load resistors on the output side.

The verilog files of the decimation filter design are in a particular design library with up to 3 hierarchical levels. The lowest level files use standard cells(DFFs etc.) from a vendor supplied library. That library is also defined in cds.lib, included in "Library List" of the config etc. But, the hierarchy editor doesn't descend down to the standard cells and stops at the lowest level of the design files. In the attached picture, ring1,ring2,dec1,dec2 have standard cells in them, but not shown.

I also tried making a softlink to all the cells in the standard cell library in the design library, but with the same result.

Simulation fails with the foll. error message for every standard cell instance:
instance 'TEST_decfil.I1@decfil<module>.fir@firfilter<module>.U44' of design unit 'INV1S' is unresolved in 'worklib.firfilter:v'. INV1S U45 ( .I(waf4nc[5]), .O(waf4nc_b[5]) );

I am using
IC 5.10.41_USR6.127.29
ius_8_2

Is there a way to specify which library the instances in a functional verilog description are from(like library/cell specification for a symbol in a schematic)?

Any help will be appreciated.

Thanks

(This seems to be an issue with the hierarchy editor, not ams simulator, but has happened to me only with ams, not spectre; So this seemed the most suitable forum to post it.)

Interesting discussion, does one know in which cases a shadow view will
be generated automatically?
I only knew that one can generate them explicitly with ADE when
your simulator is set to 'ams' under 'Tools->Update->Text Views...'

* bernd

B O E,

Thanks a lot for the pointer. Things are fine when I do verilogIn with IC5141_ISR500.2.29; but not with IC5141_USR6. Unfortunately, I have to switch back to the latter for simulation because some of our licenses don't work with the former, but I am glad to have some solution.

nrk1