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fabian Junior Member Offline Posts: 19 Europe	Code level for analog block Feb 06^th, 2012, 2:04am Dear All, I am wondering if there is a standard for code level to model an analog block in veriloga. For example, code 0 could be the model in veriloga of only the pinout of the block, code 1 could be current supply of the block added from code 0 and so on ... Best regards, Fabian
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ywguo Community Fellow Offline Posts: 943 Shanghai, PRC	Re: Code level for analog block Reply #1 - Feb 9^th, 2012, 1:04am Hi Fabian, Have you read any verilog-A manual, tutorial, books? I don't understand what you mean. Yawei
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Geoffrey_Coram

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Massachusetts, USA

Re: Code level for analog block
Reply #2 - Feb 13^th, 2012, 10:44am

I've never seen that sort of thing done. Would you specify it as a parameter to the model, or would you specify the modeling level at the design level?

I know the Verilog-AMS "paramset" concept allows for you to specify that a certain set of model parameters is "digital" and another is "analog" so that you could have the simulator pick the appropriate model card for speed or accuracy, depending on the context. But I've never seen anyone actually do it.

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If at first you do succeed, STOP, raise your standards, and stop wasting your time.

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fabian

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Europe

Re: Code level for analog block
Reply #3 - May 11^th, 2012, 2:32am

It has nothing to do with a parameter to be implemented in veriloga. I mean if there is a standard to define code level for analog block such as for exemple:
only terminal declaration on a code makes code level 0
having current consumption on top of level 0 makes code level 1
and so forth ....

The answer could be there is no standard and it is down to each individual company strategy. I am interesting to start from somewhere.

Best regards,
Fabian

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carlgrace

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Berkeley, CA

Re: Code level for analog block
Reply #4 - Jul 11^th, 2012, 6:17pm

fabian wrote on May 11^th, 2012, 2:32am:

It has nothing to do with a parameter to be implemented in veriloga. I mean if there is a standard to define code level for analog block such as for exemple:
� only terminal declaration on a code makes code level 0
� having current consumption on top of level 0 makes code level 1
� and so forth ....

The answer could be there is no standard and it is down to each individual company strategy. I am interesting to start from somewhere.

Best regards,
Fabian

I developed Verilog-A and Verilog-AMS models for three different organizations and I have never seen anything like it. Most people pretty much follow the style in Ken's book (you can see it in the example code on this website)

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