Hi,
I have two circuits, the first is a ring oscillator with a clock sampling the transitions of the oscillator. My second circuit is a current steering DAC which at the moment is not clocked or anything and I provide a fixed digital code to the DAC to test the output. These are two completely separate circuits and I run them in separate files and they work ok. Now at some point in my design I have to interface these two circuits. But even without interfacing or making any connection in between them, when I put these two circuits in the same schematic file, I get into trouble.
The output current of my DAC gets noisy and starts oscillating (remember the DAC has a fixed Digital code at the input which is not changing and there is no connection whatsoever between the DAC and the oscillator except that they are in the same schematic file). The output which should be around 20nA has fast varying spike which go till 1uA. And these oscillations start after on clock period of the oscillator clock. The clock is of 1MHz. When replying please remember the only link between the DAC and the clocked circuit is that they are in the same schematic file and nothing else. I think this might have to do something with the time step of the transient simulation?? PLEASE HELP.

EngrMunna,

Which simulator version do you use? What are your accuracy settings? How much current flows in the DAC / the oscillator? ...

Note that 20 nA are hard to accurately simulate with a lot of activity in the circuit.

- B O E

HI,
@boe I think its the 2009 version of cadence... And the current flowing in DAC is around 20 nA and in the oscillaotr it varies from 160nA to 240nA. I have simulated some filters along with htis oscillator around the same current levels..they worked ok. For the accuracy setting i tried conservative moderate and liberal but no luck they give same response...

@wave Yeah I thought so too that i might have some net name common which I can't see....so i created  symbols for the dac and oscillaotr...with no input outputs the symbols are just rectangle boxes. And put the symbols in the same schematic...but still the same problem persists...and what analog options aer you refering too?

Let me rephraase my question and observations....forget the Oscillator and DAC. Now I have localised the problem. I have a an op-amp..which is a folded-cascode followed by a common source amplifier and then an inverter. These three stages make an op amp. Now for the inverter I am baising it in the mid of its transition point...that is the highest gain point. When I use this op-amp in a unity gain configuration it works fine. Now without making any other changes I limit the maximum step size to a small value like 10n sec. And all hell breaks loose. the invereter becomes unstable and starts oscillating. I mean why limiting the maximum step size in the simulation makes this circuit oscillate??

Also when I bias the inverter in the region where the gain is low, and then put the whole op-amp in unity gain feedback it works fine even with a small step size.. but ofcourse the voltage following is not that good then because of the lower gain then...

And this is the point where the last stage of the amplifier that is the inverter biased