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How to simulate Gated Ring Oscillator? (Read 1713 times)
akash9183
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How to simulate Gated Ring Oscillator?
Mar 25th, 2013, 3:56am
 
Hi,

I have a GRO_TDC(gated Ring Oscillator Time To Digital Converter) where i have a gated ring oscillator which is enabled or disabled by the input signal Square Wave (to be replaced with PWM). The ring oscillator generates multi phase 7MHz signal (when input is Vdd) and 0 (when input is 0). This is connected to Counter and followed by adders.

I am doing tranisent simulations but the no. of points generated are too large (20K+). I had read that PSS is prefered in such cases. If i add ring osc freq in PSS and configure it for an OSC simulation, it still takes input signal (square wave) as fundamental tone. Is there a way out of this?
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