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SNR calculation for VCO based ADC (Read 407 times)
Clark
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SNR calculation for VCO based ADC
Sep 21st, 2015, 7:05am
 
Hi,

I am working on VCO based ADC with cadence IC 6.1.6.

I am doing simulation for veriloga model of VCO connected with veriloga model of phase sampler. My ADC output is continuous waveform (as attached in the figure)

I am doing trans simulation to measure THD, SNDR, ENOB for my ADC.
I went through this post http://www.designers-guide.org/Forum/YaBB.pl?num=1296932568 to measure the parameters.

My simulation parameters are:

Input: Sin wave of freq 500 KHz ( I know that I have to choose input freq such that clock is not an integral multiple of input freq, but that depends on choosing number of samples)
Clock: 50MHz

My ADC output is continuous waveform
I have few questions regarding the post. I would really appreciate if anyone could help me with my questions.

1) How to choose number of samples.
2) How to determine Input freq.
3) How to set SKIPSTART, SKIPSTOP, STROBEPERIOD.

Please help me with this.

Thanks in advance !!!
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ADC.png
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sheldon
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Re: SNR calculation for VCO based ADC
Reply #1 - Sep 24th, 2015, 11:58pm
 
Clark,

 Ignoring the type of ADC and focusing on the measurement. The
number of samples is basically personal preference. Some people
don't want to wait and use 128 points, some people use a number
of points equal the 2^(number of bits). My experience is that 256
usually gets you enough resolution for 8~10 bit ADCs.

  In general the the input frequency is dependent on what you
are trying to measure. A low input frequency should give you
the best SINAD [THD], an input frequency near the Nyquist
frequency should give you the worst case SINAD[THD].

  So for my initial test I often use something like (3/256)*sampling
frequency. If the results look good, everything is connected properly
and functioning, then I try something like (113/256)*sampling
frequency to see what the performance is.

  Since the output is digital, you should not need strobing*, just
convert directly to reconstructed analog and perform the analysis.
In the Waveform Window, use Measurements --> Spectrum and
fill the values in the form and plot the results. You can dump
the results to ADE so they displayed automatically after each
run if you would like.

* Strobing is required for sampled analog waveforms for example
  Sample and Hold outputs.

  If you have access, there is a Rapid Adoption Kit on the Cadence
support site that includes a detailed example of how to setup the
test bench and perform the measurements.

Sheldon
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Clark
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Re: SNR calculation for VCO based ADC
Reply #2 - Sep 25th, 2015, 3:19am
 
Hi Sheldon,

Thanks a lot for your valuable information.

I was trying to find the dynamic parameters of ADC using the calculator function "dft" but was not able to see the noise shaping.

However, after using the Spectrum function, I am able to see the noise shaping with same set of measurement parameters (weird).

Could you please help me with "Peak Sat. Level" entry in this Spectrum assistant toolbox for my ADC output. As you can see in the first picture attached that maximum ADC output voltage is 475V (this is because I am simulating a veriloga code for phase sampler and the output is in voltage of quantized, sampled, differentiated VCO phase).

Should I set the Peak Sat. Level as 475 ?

Also are you familiar with any cadence function which takes OSR into consideration while calculating SINAD ? If not, could you suggest any method to find SINAD considering OSR of ADC. ?

Thanks once again for your help.

Clark
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sheldon
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Re: SNR calculation for VCO based ADC
Reply #3 - Sep 28th, 2015, 12:42am
 
Clark,

  I think you are right to use peak saturation level. In general,
I use the maximum input level and a DAC with a max value of
1 to normalize the output so it is not an issue*. Oversampling is
no problem. For example, if you have a delta-sigma ADC
sampling at 10MHz and 256 oversampling, then set the bandwidth
from 0 to 20kHz [fnyquist/2] where fnyquist is (10MHz/256)
assuming a low pass ADC. For a band pass it is a little more
complex.  

Or you can normalize the bit weights in the calculator, that is,
V(msb)/2+V(msb-1)/4+...


Sheldon
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Clark
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Re: SNR calculation for VCO based ADC
Reply #4 - Sep 28th, 2015, 3:18am
 
Hi Sheldon,

Thank you for your reply.

I am sorry but could you please elaborate more on setting the bandwidth?

I approached from a different technique. I took the magnitude of the DFT plot and then used calculator iinteg function.

From: db20(dft(v("/Phase_Non_Ideal" ?result "tran")  200n 82.12u 4096 "Hanning" 0 0 1195))

changed to: iinteg(mag(dft(v("/Phase_Non_Ideal" ?result "tran")  200n 82.12u 4096 "Hanning" 0 0 1195)))

Then I took the 10log((Signal Power)/(Noise Power)). But I still couldn't get the displayed SNR value. Is there any clipping function available in Cadence ?

My problem is that after strictly following the simulation methodology used for ADC dynamic parameters measurement, I am still not getting the ideal value of SNR (ie 6.02N +1.76-5.17+30log(OSR)).

What could be the possible reasons for this behavior. ?

I would be really happy if you could provide some answers. 1

Thanks once again for all your help.

Clark

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sheldon
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Re: SNR calculation for VCO based ADC
Reply #5 - Sep 28th, 2015, 3:59pm
 
Clark,

  In the Spectrum Assistant set the start/end frequency as described.
Also be careful, when you oversample, the bandwidth you use is
reduced by the oversampling ratio. Assuming that your FFT is 4096
points and the oversampling ratio is 256, then there are 16 tones in
the band.

Sheldon
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Clark
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Re: SNR calculation for VCO based ADC
Reply #6 - Sep 29th, 2015, 6:43am
 
Hi Sheldon,

Thank you so much for your reply. I understood what you meant in your earlier and this comment.

I am now getting SNR, SNDR values correctly when I set my bandwidth from 10KHz to 500KHz (fnyquist/2).

But now I am not getting any results for THD. Its showing 0% (Infinite THD)

However, when I am keeping my bandwidth from 10KHz to 1MHz (fnyquist) I am getting THD values. On further increase in upper end of bandwidth from 1MHZ to 25MHz (Fsampling/2) the SNR, ENOB and THD are decreasing.

I can understand the lowering of SNR, ENOB as I am letting in more noise as I am increasing the bandwidth. But,

1) Why I am getting infinite THD for frequency below 1MHz ?
2) How can I find the THD values keeping the same bandwidth, i.e from 10KHz to 500KHz ? Should I export the data to matlab to find the value of THD. ?  

Your suggestion would be a great help to me.
Thanks once more.

Clark.
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sheldon
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Re: SNR calculation for VCO based ADC
Reply #7 - Sep 29th, 2015, 9:17am
 
What is the number of harmonics you are using?
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Clark
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Re: SNR calculation for VCO based ADC
Reply #8 - Sep 29th, 2015, 9:30am
 
I am using three harmonics. I have tried increasing them to 7, but no difference.
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sheldon
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Re: SNR calculation for VCO based ADC
Reply #9 - Oct 5th, 2015, 7:59pm
 
If MATLAB reads CSV, then dump a table to CSV and send it to
MATLAB for the THD calculation.
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