smlogan
Community Member
Offline
Posts: 52
Boston, MA
|
HI jyu06,
The maximum and minimum frequencies to use to compute clock jitter are really application dependent - but I can try to add a few cents ...
The maximum frequency limit is either set by a standard (for example, SONET/SDH transmission channel or Fibre Channel requirements), the capability of a measurement instrument or limited by available data.
The maximum jiitter frequency limit is the baud rate (for data) or clock rate divided by 2. Intuititely, for a clock signal, one cannot detect a jitter frequency that occurs more than once every clock cycle. For example, if every even clock pulse has a width delta_t1 and every odd clock signal has a width delta_t2, then the period of the jitter is 2 clock periods. With a clock period Tc (and hence frequency fc = 1/Tc), the resulting maximum jitter period is 2Tc - or a maximum jitter frequency of (1/2)*fc.
The minimum jitter frequency, in your case I think, is set by the minimum frequency that the post-processing of your resulting digital data is sensitive too (I'm assuming aliasing is not an issue. If aliasing is an issue - or you are doing band-limited sampling, folding of the resulting spectrum may cause some lower freqeuncy jitter components to end up "in band"). For example. suppose your digital data is fed to a bandpass filter. Then the amount of jitter that will significantly impact the signal within the bandpass filter is limited to the bandpass filter upper and lower cut-off frequencies.
Hence, there is no limit to the lower frequency, in general.
I'm not sure if I've explained my thoughts well enough. Let me know if I've managed to clarify anything or if there are any more specifics about the application that might help me better understand your lower integration limit a bit better.
Shawn
|