August West
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I'll get up and fly away
Posts: 71
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The writefinal/readic approach will work, you just have to be careful with your sources. Consider the case where there are two sources driving your circuit, one that produces a step that stabilizes after 100 ns and the other that produces a sinewave with a 300ns period. Now assume that you run to 1us and write the state of the circuit to a file. If you now rerun the simulation from t=0 and use readic to start the circuit in the previously saved state, you will have problems because you are trying to force the circuit into an unnatural state because the sources at t=0 produce different values than they did at t=1us.
There are two ways to address this. One, you can simply set the start time to t=1us, as you found out. Alternately, you can adjust the sources on subsequent runs so there initial value corresponds the their value when you recorded the state.
Another approach to increasing accuracy at a particular point in time is to include a Verilog-A module whose only purpose is to shrink the time step. This is not the same as tightening the tolerances, but can be quite effective as long as your timesteps do not vary widely over the course of a single cycle (if they do, then forcing small time steps will still work but can be very expensive). To do so, use something like this ...
module limit_timestep(); parameter real tstart; parameter real maxstep; analog begin if ($abstime > tstart) begin $bound_step(maxstep); end end endmodule In Spectre you can get the same effect by adding a disconnected sinusoidal source into your circuit that starts producing a high frequency sine wave at the point where you want more accuracy. Don't use a pulse, as it causes the simulator to use backward euler integration at the sharp corners, which tends to degrade accuracy. Given a choise, the Verilog-A approach is the best as it is the most direct and gives the finest degree of control.
Be aware that this idea of running for a while then tightening tolerances may not give you the accuracy you seek if your circuit exhibits long time constants (which is often the reason for the long initial simulation). The reason is that the error in the results that exists at the end of the long initial simulation interval will take a long time to decay because of the long time constants.
-August West
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