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Floorplan for mixed-signal circuit (Read 976 times)
ywguo
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Floorplan for mixed-signal circuit
Aug 14th, 2004, 3:09am
 
Hi,

Is there any reference on floorplan for mixed signal circuit?

I am often confused by the choice of pads, the arrangement for power ring.  For example, a circuit integrating ADC, PLL, and crystal oscillator, how do I plan the power supply for pad rings?


Thanks
Yawei
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Sardineta
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Re: Floorplan for mixed-signal circuit
Reply #1 - Jan 2nd, 2005, 9:06pm
 
I was browsing on the web and find this
http://www.williamson-labs.com/480_lay.htm
I am not an expert on this them
hope it can helps you
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Paul
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Re: Floorplan for mixed-signal circuit
Reply #2 - Jan 3rd, 2005, 1:51pm
 
Yawei,

if you use a standard pad library for your design with ESD protection, the library provider should deliver you some application note to describe the criteria of correct power pad placement. It does usually not care about supply isolation between different analog/mixed-signal and digital blocks, but it already gives some starting point.

Then you should be careful about which blocks may generate supply noise and which may be sensitive to such noise. Try to provide them, as much as allowed by your pad library, with separate power lines from separate pads.

Paul
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Teddy
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Re: Floorplan for mixed-signal circuit
Reply #3 - Jan 3rd, 2005, 3:04pm
 
the basic idea of the floorplanning is very simple - split noisy and quiet circuit blocks. Usualy Analog part is supposed to be quiet and digital you do not really care. The basic point I use are:
- split analog and digital VCC and VEE. Different pins if possible if not use different pads and bond those to the same lead.
- Plenty guradring/subs ties between block - distance is the best cure...
- if you can afford back bond to gnd do it.
- put plenty decoupling caps between VCC/VEE
- arround the die use digital power to connect to edge seal

good luck
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ywguo
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Re: Floorplan for mixed-signal circuit
Reply #4 - Jan 9th, 2005, 7:15pm
 
Teddy,

- put plenty decoupling caps between VCC/VEE,

is that a typo? I think we should put decoupling caps between VCC to ground and VEE to ground.

- arround the die use digital power to connect to edge seal,

Why? Do you mean connect digital power to seal ring?

Thanks
Yawei
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