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Simulations of SC circuit don't match theory (Read 7024 times)
Peter Kurahashi
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Simulations of SC circuit don't match theory
Aug 30th, 2004, 12:04pm
 
My problem is this:  Simulations of the S&H circuit from “Simulating SC Filters in SpectreRF” for sampling frequencies above the Nyquist rate don’t match theory.  

Using Ken’s work as a guide my reasoning goes like this.  When sampling above the Nyquist rate only the zero sideband is of interest because there is no aliasing.  The sampled spectral density therefore becomes:

Ss = Src*fc^2  for abs(f) <or= fc/2

Implementing the hold operation:

Sh = [(1-m)*Tc*sinc(f*(1-m)*Tc)]^2 * Ss
Sh(0) ~ [(1-m)*Tc]^2 * Ss(0)        because sinc goes to 1
Sh(0) ~ [(1-m)*Tc]^2 * Src(0)*fc^2
Sh(0) ~ (1-m)^2 * Src(0)

Taking m=0.4,
Sh(0) ~ 0.36 Src(0)

Sc = St + Sh where St = m*Src, therefore
Sc(0) = 0.4 Src(0) + 0.36 Src(0) = 0.76 Src(0)

This result was confirmed using C. –A. Gobet’s method in “Spectral distribution of a sampled first order lowpass filtered white noise,” Inst. Elec. Eng. Electron. Lett., no. 19, vol. 17, pp. 720-721, Sept. 1981.

Both solutions show that for a resistance of 2.3kohms which gives a continuous time DC spectral density of 38 aV^2/Hz, the composite DC spectral density should be 0.76 times this or 29aV^2/Hz.  

When the S&H circuit is simulated in SpectreS the results match well for sampling frequencies well under the noise cutoff frequency.  But when the sampling rate is increased above the Nyquist rate Sc(0) reaches a limit to just under 100aV^2/Hz, 2.5 times Src(0).

For my simulations I tried both an ideal switch with a noisy resistor and a pair of mosfet switches.  Both showed the same behavior.  I used a maxsideband of 50 and as I increased the clock frequency I adjusted the required maxacfreq.   Sampling above the Nyquist rate and selecting zero sideband only showed the same results.  

Any ideas?

Thanks,
Peter
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Ken Kundert
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Re: Simulations of SC circuit don't match theory
Reply #1 - Sep 1st, 2004, 9:25pm
 
Peter,
   I believe your initial assumption is wrong. Your statement that "above the Nyquist rate only the zero sideband is of interest because there is no aliasing" is incorrect. As proof of this, remember that the spectrum of any Tc sampled signal must be periodic with period fc = 1/Tc. This is true even at frequencies beyond the RC cutoff frequency, therefore low frequency energy must be aliasing up. Otherwise Ss(f) would go to zero for all f >> 6.23/RC, and so if it were periodic, that would imply that Ss(f)=0 for all f.

-Ken
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Peter Kurahashi
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Re: Simulations of SC circuit don't match theory
Reply #2 - Sep 2nd, 2004, 4:58pm
 
Ken,

Thank you for taking time to answer my questions.  I appreciate it very much.  I agree with what you said and my statement about aliasing was wrong.  What I meant to say and how my understanding goes is this:  Sampling of a signal produces replicas of the un-sampled signal at multiples of the sampling frequency.  If the sampling frequency is very large compared to the bandwidth of the signal (over twice the bandwidth determined by Ron and C), then the contribution from the replicas is negligible in the signal bandwidth because they are spaced very far apart.  In this case I was assuming that the noise contribution from the replicas was negligible in the bandwidth and even less near DC because I am sampling at a high enough frequency.  

I have tried sampling up to frequencies of 1THz but Sc(f) doesn’t drop to the level I would expect to see if the contributions from the replicas was very small.  

Best Regards,  
Peter
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Peter Kurahashi
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Re: Simulations of SC circuit don't match theory
Reply #3 - Sep 2nd, 2004, 7:45pm
 
Here are plots of PSD for different clock frequencies.

This is the theoretical model from C. -A. Gobet's paper.
http://web.engr.oregonstate.edu/~kurahape/noise-theory.bmp
You can see that Sc(0) limits to 29aV^2/Hz or 5.4nV/sqrt(Hz)

This is the simulation data from Spectre.
http://web.engr.oregonstate.edu/~kurahape/noise-simulation.bmp
Here Sc(0) limits to 90aV^2/Hz or 9.5nV/sqrt(Hz).  This simulation used maxsideband=50.  

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Ken Kundert
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Re: Simulations of SC circuit don't match theory
Reply #4 - Sep 3rd, 2004, 11:03am
 
Peter,
Sorry for the misunderstanding. Now that I have gone back and reread your original post it is clear that the mistake was mine.

Thanks for posting the results; that really helps. They show that for the higher clock rates the Spectre results are taller and narrower, which indicates that Spectre thinks the effective hold time is longer than the value you are using in your theoretical results. This is likely due to some aspect of the circuit that you are not modeling. For example, it might be due to the slow turn-on and turn-off of the switches due to the finite transition time on the clock.

I don't believe the discrepancy you are seeing is due to a problem with Spectre or its configuration. However, if you want to further reduce the chance of that, try tightening the tolerances. You might consider using errpreset=conservative or tightening reltol (I don't recommend doing both at the same time). You have already used a relatively large value for maxsideband. You might also try using a larger value for maxacfreq or tightening maxstep.

-Ken
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Peter Kurahashi
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Re: Simulations of SC circuit don't match theory
Reply #5 - Sep 21st, 2004, 3:42pm
 
Ken,

I think I found why the simulations were not matching the theory.  I'm fairly certain that at high frequencies the noise in the track and hold phases are correlated.  This causes extra cross correlation terms to be added to the final power spectral density.  Including these cross correlation terms into my models made everything match up.

-Peter

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ic2006
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Re: Simulations of SC circuit don't match theory
Reply #6 - Nov 7th, 2005, 2:26pm
 
Hi peter,
 Could you please give further explaination about why this correlation happens? I have some similar problem to match the theoretical result with the Spectre simulation output.

Thanx
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