Designer’s Guide Community

Pages: 1 2 3 ... 46

Subject	Started by	Replies	Views	Last post
Verilog-A Oscillator Phase noise	shico	0	15	Apr 15^th, 2019, 12:39am By: shico
question on pnoise sim theory	dog1	2	41	Apr 12^th, 2019, 2:19am By: dog1
SpectreRF Front-end receiver measurements	MWJ1975	3	93	Apr 5^th, 2019, 1:03am By: Andrew Beckett
Equivalant resistance of switched capacitor circuit	KP	0	49	Mar 14^th, 2019, 4:21am By: KP
Reg peaking in noise spectrum in pnoise simulation with Spectre	ULPAnalog	4	346	Jan 28^th, 2019, 4:46pm By: ULPAnalog
Some questions about SpectreRF and sampled circuits	ZY He	4	422	Jan 11^th, 2019, 6:50pm By: ZY He
HFSS eigenmode	farshad	0	186	Dec 13^th, 2018, 12:40am By: farshad
Simulation set up for Image rejection ratio of IQ Down converter mixer	analog_design	0	242	Nov 23^rd, 2018, 4:40am By: analog_design
S parameter artifacts in cadence	iVenky	4	945	Oct 29^th, 2018, 5:08pm By: iVenky
Simulation of LTE transmitter in SpectreRF	RFn00b	3	650	Oct 21^st, 2018, 2:22pm By: Andrew Beckett
I have a question	nguyen	1	381	Oct 21^st, 2018, 4:59am By: Andrew Beckett
How to calculate phase noise of PLL in cadence?	pashtp	2	660	Jun 20^th, 2018, 11:33pm By: pashtp
noisetype=pmjitter in a pnoise simulation	Siwen	2	652	Jun 12^th, 2018, 2:11am By: Siwen
Rectenna simulation for Rf energy harvesting on ADS	Asma.Didi	3	1508	May 6^th, 2018, 10:52am By: Murat H. Eskiyerli
Phase noise in an inverter	deba	0	560	Mar 8^th, 2018, 3:33am By: deba
Question about phase noise simulation result « Pages 1 2 3 »	YCY	32	36192	Feb 21^st, 2018, 10:54pm By: deba
MOS varactor test bench	umberabbas	1	792	Feb 20^th, 2018, 8:30pm By: umberabbas
Wrong behavior of dcblock and dcfeed in Cadence Spectre	cheap_salary	3	1054	Feb 19^th, 2018, 3:50am By: Andrew Beckett
About initial transient in periodic steady state simulation	Jacki	3	1149	Jan 21^st, 2018, 9:10am By: Andrew Beckett
for help on convergence issue when run pss simualtion	hiSkill_11	4	2713	Jan 8^th, 2018, 10:17am By: Ken Kundert

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