Hi,

As we know, the chopper stabilization technique is generally used to avoid low-frequency noise effect by up-converting (modulating) the baseband signal and then down-converting after signal amplification. So there is a modulation frequency (Fchs) involved with this scheme.
Now, considering a sampled data system that has a sampling clock (Fs) larger than Fchs.
How can I simulate the frequency response of this discrete-time system using PSS when Fs is not a multiple of Fchs and therefore, I have two indipendant clock sources?
Is it a must to generate Fsch from Fs (using dividers) to be able to use PSS?

Thank you,
Babak