Jason Dai
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I'm doing a digital PLL behavior model, need calculate the integrated phase difference of reference clock and divided down VCO feedback clock at every rising edge of reference clock, the code is below:
@(cross(V(refclk)-1.25, 1, ttol)) begin state = state +1; phasediff = 2 * `M_PI *( state + ($abstime - tfb1)/(tfb1 - tfb0)); end
@(cross(V(fbclk)-1.25, 1, ttol)) begin state = state -1; tfb0 = tfb1; tfb1 = $abstime; end
Simulation shows when the two clocks' rising edge occur at exactly same time, the phase error calculation will go wrong. the reason sounds like the calculation can not be done when the variable it used( state, tfb0, tfb1) changing.
Do somebody have same experience and how to solve it?
Thanks a lot !
Jason
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