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How does VCO affect the reference supr? (Read 6348 times)
allen
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How does VCO affect the reference supr?
Jan 17th, 2005, 3:10am
 
Hi,

    I'm designing a frequency synthesizer. When an ideal VCO, which is described in veriloga, is placed in the loop, the simulated reference spur is below -90dBc. However, when a VCO circuit with nearly the same gain is used, the reference spur is only about -52dBc.  Can anybody tell me what has happened?  How does the VCO affect the reference spur?

   Thanks

   Allen

    ???
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boa
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Re: How does VCO affect the reference supr?
Reply #1 - Jan 18th, 2005, 6:34pm
 
In which frequencies do you have spurs? Are they multiples of VCO freq?

Also it would be good to learn more about your PLL,  its spec and how you simulate it.
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allen
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Re: How does VCO affect the reference supr?
Reply #2 - Jan 19th, 2005, 5:07am
 
   Thanks boa  :)
  The frequency of the VCO is 2.4GHz, and the reference frequency is 5MHz. The spur is at 5MHz, 10MHz ... offset from the carry frequency. The VCO's gain is about 150MHz/V, and the open loop bandwidth is 100KHz. The spur is to be designed below -70dBc.
  To simulate the spur, I first run a transition simulation with spectre, then use DFT function in the calculator to  get the specturm of the VCO's output. Is it right to simulate spur in this way?

  Allen
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boa
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Re: How does VCO affect the reference supr?
Reply #3 - Jan 20th, 2005, 8:55pm
 
The spurs should appear because of reference freq coupling through PFD/CP to VCO control voltage.  Another thing is that your filter should be able to suppress them.

Actually, I do not understand the reason why PLL's output has these spurs when you simulate with a real VCO (I suppose it has a proper phase noise characteristics) if it works fine with an ideal Verilog-A VCO..
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maserati
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Re: How does VCO affect the reference supr?
Reply #4 - Jan 26th, 2005, 4:26pm
 
Based on my experience, the DFT function from the calculater is not accurate. But it should NOT have  > 10dB difference...
try another way to sim the spur and compare
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allen
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Re: How does VCO affect the reference supr?
Reply #5 - Jan 27th, 2005, 4:50am
 
    Thanks boa and maserati.

    The reference spur decreases to -77dBc after I shorten the maximum step in the simulation option. Therefor, I think the degeneration of spur may be caused by simulation error. However, the simulation time is extremly long when the simulation step is short, and I still don't know the simulation result is the correct one( it may continue to decrease if the step gets even shorter). I wonder if there are some more effecent ways to simulation reference spur.

    Allen.
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rf-design
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Reiner Franke

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Re: How does VCO affect the reference supr?
Reply #6 - Feb 1st, 2005, 11:38pm
 
If there is no coupling via substrate or supply to the VCO impacting the spur performance the model approach is acurate enough. Only the VCO voltage ripple impact the spur then.
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