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Sigma Delta Modulator (Read 2169 times)
George Suarez
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Sigma Delta Modulator
Mar 13th, 2005, 6:33pm
 
Hi,

I'm working on a non-ideal model of a Second Order Multibit Sigma-Delta Modulator. The base model for the Switched Capacitor Integrator is that from the Medeiro book Tpo-down Design of high performance Sigma Delta Modulators. I already create the model in VHDL-AMS and have the model in Simulink. The weird thing is that the Simulink model works fine but the VHDL-AMS didn't. When I test the integrator individually the VHDL-AMS and Simulink model give the same results but when in the complete system the VHDL-AMS model is not working as is suppose to. If any can help me a with these I'll appreciate it. Thaks in advance.

George
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Paul
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Re: Sigma Delta Modulator
Reply #1 - Mar 15th, 2005, 1:14pm
 
Hello George,

I guess we would need more information to give advice:
1) info about model (level of abstraction, ...)?
2) results difference between Simulink and VHDL-AMS?
3) what means "is not working as is suppose to"?
4) how do you know that VHDL-AMS is wrong and Simulink is right?

What simulator do you use? Would you be able to post parts of the code if necessary?

As a first suggestion, I would recommend to have a look at the inputs and outputs of the model. What is different between Simulink and VHDL?

Good luck

Paul
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George Suarez
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Re: Sigma Delta Modulator
Reply #2 - Mar 18th, 2005, 6:57am
 
Hello Paul

I'll try to answer all the questions.

1) The model is a behavioral model, so it is high level.
2) You can compare the SNR PSD of the models here

http://www.ece.uprm.edu/~s988025/AMS_SIMULINK_SDM1stOrder.jpg

Sorry for the resolution if you want the FIG i can upload it. The weird thing is that even doing an ideal simulation in VHDL-AMS the results are not good and are similar to the VHDL-AMS Medeiro model from the jpg.
3) The "it's not working as supposed to" means that I have a partner who validated the SIMULINK model with SPICE and the results were great. I think this anwser question 4).

I'm using Simplorer SV since is less limited than the SystemVision EDU. IF you want I can post the code or upload it into my web space. Thanks.

George
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Re: Sigma Delta Modulator
Reply #3 - Mar 18th, 2005, 1:22pm
 
George,

Currently I do not see the exact problem. I suppose by behavioral model you mean z-domain model. Is this correct? If so, did you compare with results from Schreier's Matlab toolbox? I am not so used to very low OSRs, but I am a little surprised that even the ideal modulator hardly has the 40dB/dec noise shaping slope it should have? BTW, what is the difference in implementation between the ideal and the Medeiro designs (I don't have the mentioned book...).

Could you suffer from coefficient truncation in the VHDL-AMS implementation? To compare, Simulink can perform coeffcient truncation too.

The peak in the out-of-band noise would indicate your transfer function is not identical to the Simulink one. This can either come from coefficients, from truncation in math operations (adders and multiplieres) or from delays. Did you keep the exact same arrangement of z-1/(1-z-1) and 1/(1-z-1) compared to Simulink?

Paul
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Re: Sigma Delta Modulator
Reply #4 - Mar 22nd, 2005, 8:43am
 
Sorry for the delay to reply. For the ideal model that's correct I'm using a Z-domain model. In simulink is just a 1/z loop or delay loop to produce the integrator z function. The behavioral model from the Medeiro book is different. The integrator is a set of equations that describe the transient behavior of the integrator taking in consideration the slew rate, input capacitance, output capacitance and other parasitic capacitances in the OTA.

Going back to the problem. I tried the same z-domain model of Simulink in AMS but it didn't worked. I noticed that something was not right, so I start to to some debugging. Finally I found that the Individual Level Averaging (ILA) model wasn't working correct. So I fixed it and then the PSD for the Ideal first order Multi-bit Modulator was pretty the same as the one from Simulink.

Next problem, the model for the Ideal Second-Order Multi-bit Modulator doesn't work!! I tried the z-domain and also the delays loops to represent the z-domain equations without sucess. For some reason I start playing with the time step of the simulator and it start working but not right. The PSD looks familiar to the one from Simulink but after the fundamental frequency of the input signal it has some kind of offset.

Something surprising is that using the z-1/(1-z-1) or 1/(1-z-1) in AMS does not work, at least with Simplorer6.0. Is not even close, the system becomes unstable. Later on I'll try to upload the graphs for the PSD comparison between Simulink and VHDL-AMS for the ideal 1st order SDM. Please let me know what you think.

George
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Re: Sigma Delta Modulator
Reply #5 - Mar 23rd, 2005, 5:30am
 
Paul,

I think I fixed the problem (partially). For some reason the simulator is very sensitive to the time step. I fixed the time step to half of that of the 1/fs, so I'm applying the Nyquist criterium. Also for some reason the VHDL-AMS ZTF code was wrong so I fixed it. Here is the plot of the PSD for the Ideal 1st and 2nd Order Sigma Delta Modulator using Simulink and VHDL-AMS.

http://www.ece.uprm.edu/~s988025/Ideal2ndOrderSDM.emf

http://www.ece.uprm.edu/~s988025/Ideal1stOrderSDM.emf

I'm veryfying the model one more time since I think I have an extra delay element in the loop. Let me know what you think.

George
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Re: Sigma Delta Modulator
Reply #6 - Mar 23rd, 2005, 3:07pm
 
Hi George,

good to hear. Unfortunately I am unable to read your plot files. Could you let me know what software to use to read these?

If I understand correctly , the simulator time step exceeded 1/fs in previous simulations (i.e. you say you get different results now that you fixed it below this value). This sounds surprising, if you have clock events at 1/fs, the simulator should consider these to fix the step. Maybe Ken can give more information on this (although you use third party software)?

If the simulator really "jumped over" some clock events in your modulator, it is not surprising you get wrong results.

Paul
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Re: Sigma Delta Modulator
Reply #7 - Mar 24th, 2005, 12:23pm
 
Hi Paul,

The format is emf for enhanced metafile format I think. You can open it with the windows picture viewer or Paint. If you can't open them let me know. I decide to use the hAMSter freeware software. It is only a VHDL-AMS compiler with some language limitations and a nice viewer. I built the 1st Order Sigma Delta Modulator and the output looks ok (I need to do the SNDR plot to verify). Here is the code:

http://www.ece.uprm.edu/~s988025/1stOrderSDMvH.vhd

Since it worked from the fist try I decide to built the Ideal 2nd Order SDM but this is not working. It is built with the same components as the 1st Order just adding a new integrator. I'm using DELAY units instead of the 1/z models since hAMSter doesn't support the ZTF from VHDL-AMS (one of the limitations). I'm going to keep trying. Here is the code:

http://www.ece.uprm.edu/~s988025/2ndOrderSDMvH.vhd

If you have time please check it out maybe I'm making a mistake. Which compiler and simulator do you use?Have you used hAMSter?

Thanks in advance,

George
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Re: Sigma Delta Modulator
Reply #8 - Mar 28th, 2005, 11:36am
 
Hi George,

I did not have time to check your code, I just went over it quickly. I was not able to open your plots with either Paint or Imaging (Win2k)... Are you able to provide a more conventional format (e.g. gif, jpeg, tiff,...) or let me know which tool to use to read these files (not even Gimp was able to read it). Further more I never used hAMSter, but I heard about it. I am lucky enough to have a licence for Advance MS from Mentor.

One major difference I noticed when going from a 1st-order to a 2nd-order modulator is the introduction of the ILA block. I would suggest a step-by-step approach, introducing one novelty at each step. This means I woul first add the additional integrator with an ideal DAC (no mismatch). If the result is OK, I would add the ILA (with no mismatch), check again the result. Finally, I would add mismatch to the DAC and see if the ILA compensates correctly.

BTW, regarding the tool question: As the whole modulator is a discrete-time system and you are using real operations, you could model (almost) everything in your model in pure VHDL instead of using VHDL-AMS. I don't know if you intend to use non-idealitites later. If you don't, using VHDL would speed up your simulation time and let you use other free simulators with complete language support.

Please let me know about the results of the mentioned approach.

Paul
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Re: Sigma Delta Modulator
Reply #9 - Mar 28th, 2005, 11:52am
 
Hi Paul,

Here are the plots in jpg format:

http://www.ece.uprm.edu/~s988025/Ideal2ndOrderSDM.JPG

http://www.ece.uprm.edu/~s988025/Ideal1stOrderSDM.JPG

I was able to simulate the non-ideal first order (later I will upload the plot). About the VHDL modeling it is a good idea, but since I'll be adding noise sources, and some need derivation I think VHDL-AMS is better for that. Do you suggest that instead of using quantities I rather use signals? Can you tell me more about it? One comment, I installed the latest vestion of Simplorer the 7.0, and the models stop working. For some reasons they stop working. I start playing with them working with the signals and variables until they finally work (only the integrators models). Something's wrong with this software and they change stuff from version 6 to version 7. How did you get a AdvanceMS license? It is a trial version or something? Let me know, I've been looking for one without sucess. It was impossible to find a limited version of the software. I'll start working step by step as you suggest.

George
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Re: Sigma Delta Modulator
Reply #10 - Mar 28th, 2005, 12:04pm
 
George,

you should be more specific when commenting your results. The plot of the 2nd order modulator shows identical curves for Simulink and VHDL-AMS, so what is not working correctly?

The ADvance MS licence is paid by my employer of course... But except for the restrictions, the simulation engine should be identical to Simvision, which is available for free (with limitations of course!). Maybe Andrew can give a hint on evaluation licences for AMS Designer?

Regarding the use of quantities, I believe they are useful when you really compute Kirchoff's laws, but using quantities at the interfaces instead of real signals just for the beauty of it doesn't make sense (again my very personal opinion).

Paul
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Re: Sigma Delta Modulator
Reply #11 - Mar 28th, 2005, 12:18pm
 
Ok, for the next plots I'll try to be more specific and less confusing. Sorry for that.

1) The last plots I sent you were from the ideal Sigma Delta Modulator (SDM) models for both SIMULINK and VHDL-AMS. This was the first problem I was working on. Remember? the VHDL-AMS ideal model wasn't working.

2) The second problem was that for the SDM with the non-ideal integrator it only worked for the 1st order and not for the 2nd order SDM. (Later, I'll send you the plots for the SNR PSD of the 1st order SDM with non-ideal integrator for VHDL-AMS and SIMULINK)

I'm going to make a new version of each model containing signals. I'm going to make exclusive use of quantities when necesary (i.e. integration, derivatives etc). About the simulator I'm going to download SystemVision and give it a try. If you have any suggestions let me know. Thanks a lot.

George
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Re: Sigma Delta Modulator
Reply #12 - Mar 28th, 2005, 12:55pm
 
George,

don't understand me wrong. I did not say that you should rewrite your whole model using signals instead of quantities. The probability that this would solve your problems is relatively small! It was meant to be a general remark related to the use of pure VHDL (in case you did not intend to add analog nonidealities). Don't spend your time on this. I believe you should be able to identify your problems using the step-by-step approach discussed before.

If I get it correctly, the ideal models are now all working correctly. The non-idealities you add are the DAC nonlinearities. Is that correct? With DAC NL, the 2nd-order modulator does not give the expected results, right? If so, can you provide intermediate results of this topology following the above approach?

Paul
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Re: Sigma Delta Modulator
Reply #13 - Mar 28th, 2005, 1:00pm
 
OK no problem. As you said, the ideal model for both 1st order and 2nd order are working, at least in Simplorer 6.0, I'm having problems with Simplorer 7.0.  The non-ideality i'm adding right now is the integrator dynamic behavior. This is the non-ideal model I'm talking about. Right now the DAC is ideal and the ILA is off. Does this answer your question?

George
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