The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 29th, 2024, 7:11am
Pages: 1
Send Topic Print
Standard Technology for MOS devices (Read 2892 times)
vikramts
Junior Member
**
Offline



Posts: 17

Standard Technology for MOS devices
Mar 17th, 2005, 7:48pm
 
Hi all

I am using the CADENCE Library model for a MOS transistor for my structural circuits. I would like to know what feature sizes define this model's behavior best. Is there any specification on the technology used too? I am using 0.8u currently.

The model is available at:

opt/CAD/Cadence/LDV-4.1/tools/dfII/samples/artist/spectreHDL/Verilog-A/semi-dev

It is titled mos_level1.va

I can send this code to you if you are not able to locate it.

Thanks

Vikram
Back to top
 
 
View Profile   IP Logged
Andrew Beckett
Senior Fellow
******
Offline

Life, don't talk to
me about Life...

Posts: 1742
Bracknell, UK
Re: Standard Technology for MOS devices
Reply #1 - Mar 20th, 2005, 2:11am
 
This is an example Verilog-A model of a level 1 model - which is not really going to be applicable to any modern technologies (it's an early SPICE model). It's there as an illustration of how device models can be implemented in Verilog-A.

You would be far better off using one of the built-in models in spectre or AMS Designer (e.g. bsim3v3, bsim4 etc). In practice you'll use a model file which sets the parameters for these models for the technology you're using - you wouldn't just make something up.

Or, if you want an illustration, download the Cadence "GPDK" (Generic Process Design Kit) from http://pdk.cadence.com - this gives example models for a typical process - if my memory serves, 0.18u and 90nm examples are available. This is not tied to any foundry - just for illustration purposes.

If you're using a particular technology, get the design kit from the supplier of that technology, and use the models provided.

Regards,

Andrew.
Back to top
 
 
View Profile WWW   IP Logged
vikramts
Junior Member
**
Offline



Posts: 17

Re: Standard Technology for MOS devices
Reply #2 - Mar 21st, 2005, 7:11am
 
Hi Andrew

Thanks very much. I've contacted Cadence to get access to one of their Design kits. As such, my models have been built more so to illustrate the usefulness of Verilog as opposed to the practicality of real-time fabrication but you've given me some very useful tips there.

Thanks again!

Vikram
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.