The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 29th, 2024, 2:36am
Pages: 1
Send Topic Print
Hidden state in VCO (Read 2415 times)
tromeros
Junior Member
**
Offline



Posts: 11
Greece
Hidden state in VCO
May 23rd, 2005, 8:35am
 
Hi to all, this is my first post and I am very glad to participate in such an interesting and useful forum.
I have a question concerning the VCO described in the paper "Predicting the phase noise and jitter of PLL Based frequency synthesizers". In page 37 there is the verilog code of a VCO. I wrote this code in Cadence and had a transient analysis. However, when I try to make a pss analysis I get the error that there is a hidden state, concerning the variable dT. I read the paper "Hidden state in SpectreRF" but I cannot correct the problem. I wonder if it is possible to have pss analysis in the specific behanioral model. Thanks in advance.  :)
Back to top
 
 
View Profile   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2384
Silicon Valley
Re: Hidden state in VCO
Reply #1 - May 23rd, 2005, 10:43pm
 
Hidden state is not the only reason why that model will not run in PSS. The model exhibits jitter, and so does not produce a periodic output. As such, any circuit containing this VCO cannot achieve a periodic steady state.

If you remove the jitter code, the model should work in PSS.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.