Hey everybody,
Since some time I concern myself with the effects of the aperturjitters on the SNR. Now with the specification of one of our PCBs I have noted that RF developers doesn't handle with jitter. They only handle with phasenoise and thus I have to specify the clock in terms of phasenoise. To calculate the aperture jitter from phasenoise you have to integrate the phasenoise in the way described in the formula below.

tap=1/(2*pi*fsig)*sqrt(integral(Sphi(f)df))
with Sphi=double sideband phasenoise and Sphi(f)=2*Lphi(f) single sideband phasenoise

In the app. notes I found this formula, there were no frequency limits specified or the limits are 0Hz and infinite. If I take this limits the result of the Integral is 1 and this result helps me not much. So for the first I took those limits:
The lower frequency limit: flow=1/recording length for ADC applications flow=fsample/N
The upper frequency limit: fupp=noisebandwidth of clockinput.

But here I'm not sure. In my opinion I have to take only half the noisebandwidth. If I integrate Sphi from flow up to the noisebandwidth I get 2 times the power within this band.

Can someone help me finding the right frequency limits?

If someone is interested, I can send him some pictures and formulas which illustrates the issue much better then all the text above. Unfortunatly I'm not able to put this information into this kind of email.

With best regards
                                   papalolo

I believe that Sphi is typically defined as the double sided psd of the phase.  L(f) - the psd of the output voltage noise - is usually given as single sided (at least by SpectreRF and spectrum analyzers).  I think this is where the factor of 2 comes from.  

In Hajimiri's equation 49, he integrates Sphi from 0 to inf rather than from -inf.  Since this is only a single sided integral, the factor of 2 relation to L(f) is not necessary.

-Design1