Hi,

I am trying to port a simple ring oscillator VCO to an older process within the same foundry.  When I run a pnoise analysis on the present design using a spice BSIM4 model provided by the foundry I get very reasonable results.

The older process provides only a BSIM3 spice model and when I run the exact same circuit with those models, I get an increase in phase noise of almost 40dBc/Hz at the same offset.  To rule out actual circuit issues I replaced all the biasing with ideal sources leaving only the ring, and I still see a 30dBc/Hz increase independent of PVT.  

If anyone has ideas on what could cause such a discrepancy I would greatly appreciate it.  

Regards,

Randy