Hi

Can anyone suggest me some paper which relates the IIP3 and 1 dB compression point to Drain current, gate overdrive etc.... for a LNA

Thanks

Regards
SUDHIR

The main reference for the CMOS IP3 is not correct in the refered website document.
Here is link to the author's presentation (Thomas Lee's Standford group)
http://www-smirc.stanford.edu/papers/cancun97s-chet.pdf
And here is the paper
http://www-smirc.stanford.edu/papers/cancun97p-chet.pdf

Also note that the web paper on LNA's is about differential LNAs, but the IP3 paper is on short channel single ended MOSFETs.

There was also a good characterization paper at RFIC 2005 on linearity of short channel MOSFETs.

Guofu Niu; Jun Pan; Xiaoyun Wei; Taylor, S.S.; Sheridan, D., "Intermodulation linearity characteristics of CMOS transistors in a 0.13 /spl mu/m process," Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE , vol., no.pp. 65- 68, 12-14 June 2005