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Questions about simulation of PFD/CP and FD jitter (Read 1957 times)
alexzxb
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Questions about simulation of PFD/CP and FD jitter
Oct 18th, 2005, 10:36pm
 
Dear all,

According to Ken's paper of "phase noise and jitter", I need to get the jitter of PFD/CP and FD blocks to determine the overall jitter of the PLL.

Unlike oscillators, for PFD/CP and FD, input signals must be given to get pss and pnoise results. In the paper, it is said "a representive input" should be set for PFD/CP and FD. I wonder how to set the input.

For PFD/CP, a reference and feedback clock act as the input for PFD, should I add some delay between these two signals, how do I set the rise and fall time? For FD, the latter question is also bothering me.

Any answer and discussion is appreciated.
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