Paul
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Re: Request paper/doc on digital CDR loop analysis
Reply #3 - Nov 3rd, 2005, 1:22pm
The above-mentioned documentation addresses the issues you mention, except that it considers bang-bang PLLs and not phase interpolation CDRs. For more information on BB-PLL CDRs, you can also look for papers by Y. Greshichev.
Concerning phase interpolation structures, the following reference may serve as a starting point: "A semidigital dual delay-locked loop" Sidiropoulos, S.; Horowitz, M.A.; Solid-State Circuits, IEEE Journal of Volume 32, Issue 11, Nov. 1997 Page(s):1683 - 1692
Best,
Paul
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