Hello,
I want to make a post-layout simulation in Calibre. At the moment I'm extracting the layout with CalibreXRC and looking at the report and placing the parasitic capacitances in the schematic view and simulating. But it takes a long time and I know that this is much simpler with Diva, because within Spectre, the circuit can be simulated with its "extracted view" by adding in the Setup>Environment menu in Analog Design Environment window. So is there a simpler way to make post-layout simulations in Calibre?  :-/

Thanks!
Sezi

Hi,

You didn't tell us in which environment you try to do a post layout
simulation.
Is it pure Mentor, Calibre and Eldo or is it mixed Mentor and Cadence, Calibre and Spectre.

> I want to make a post-layout simulation in Calibre.
The simulation has to be done  with a simulator Eldo or Specrte in this case, Calibre is just the LVS and Extraction tool.

An additional hint to Pauls input, if you  use  a  mixed Mentor and Cadence environment you should rather use the Hierarchy Editor with the config view to alter the switch view list then doing this over the Environment Setup. This allows you to directly probe your extracted netist in the schematic at least with Assura and Spectre.

Bernd

Sezi,

I can't give you further hints at this point, because I'm using Cadence Assura
for LVS/Extraction, just know Calibre form DRC and LVS/Extraction
form 4 Years ago.

Why not sign up to Mentors SupportNet and get the AppNote Paul
suggested.
You are using a Mentor Tool, because Calibre is one.
http://www.mentor.com/supportnet/quickaccess/SelfReg.do

Bernd