Saroj Rout
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I am modeling a current-controlled-current-source in the following way.
`include "disciplines.vams" `include "constants.vams"
module cccs_int (inp,inn,outp,outn)
input inp; input inn; output outp; output outn;
electrical inp; electrical inn; electrical outp; electrical outn;
parameter gain=1.0;
analog begin I(outp,outn) <+ gain*I(inp,inn); end
endmodule
When I terminate the output with a resistor it seems to be working fine. But when I terminat it with a capacitor, I was expecting a integrated output but the output seems to be some very High constant voltage instead.
Does anybody know why the cap is not integrating the output of the controlled current source ?
Thanks in advance.
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