hello everybody,

I need to run an ac simulation on boost converter working in CCM mode to find out the best error amplifier compensation. I therefore need to create the small signal model of the PWM switch in verilog-a.

I have created a model based on a spice model from a paper "A tutorial introduction to simulating current mode power stages." The results that I get are not as acurate as the mathamatical simulations that I have previously ran in OCTAVE. (resonance frequency shift, DC op-point output voltage differs slightly with different duty cycles, and magnitude).

Attached is the verilog-a source code and the mathematical transfer function from OCTAVE (Gvd).

Does any body have any suggestions?????
Also any links to other models that I can base the design on?

hello,

Good point, I can't find the download button either! here is my verilogA code and OCTAVE calculation.

// VerilogA for power, PWM_switch_3, veriloga

`include "constants.vams"
`include "disciplines.vams"



module PWM_switch_3(c, a, p, cont, vin);
 inout c, a, p, cont, vin;
 electrical c, a, p, cont, n1, n2, n3, vin;
 
 
 parameter real R0 = 27;                              //output load
 parameter real VD = 800m;                              //diode voltage
 parameter real RL = 190m;                              //coil resistance
 parameter real Rdson = 500m;                              //transistor resistance
 parameter real IA = 700m;                              //output current
 parameter real Rcap = 500m;                              //ESR capacitor
 parameter real Rdiode = 10m;                              //diode resistance
 parameter real Rm = 0.0;                              //modulation resistance
 
 
 real IC, VAP;                                          //internal DC parameters
 real VPA, IP, QB, QA, QC, D, Re, Rc;
 
 branch (n1, a) vcvs_1;
 branch (a, p) vccs_1;
 branch (n1, p) cccs_1;
 branch (n2, p) vcvs_2;
 branch (c, n2) Rs;

 
analog
  begin
     
     @(initial_step) begin
           //DC operation point calculation
           VPA=IA*R0*2+6;              
           IP=IA/(2*1.517) + 0.05;            
           QA=Rdson*IP;
           QB=(VPA+IP*(RL-Rdson));
           QC=(V(vin) -VPA-IP*RL-VD);
           VAP=-VPA;
           D=(-QB + (sqrt(QB*QB -4*QA*QC)))/ (2*QA);
           IC = IP / (1 - D);
           Re = (Rcap * VPA)/(Rcap*IP + VPA);
           Rc = Rm +/* (D*Rdson) + ((1-D)*Rdiode) + */(Re*D*(1-D));
     
           if(analysis("dc"))begin  
             V(vcvs_1) <+ 0.0;                        //n1, a
             I(vccs_1) <+ 0.0;                        //a, p
             I(cccs_1) <+ -IC * D;                        //n1, p
             V(vcvs_2) <+ VAP * D ;                  //n2, p
             V(Rs) <+ IC *  Rc;                        //n3, c
           end
           
                       
     end//initial_step        


     if (analysis("ac"))begin
       V(vcvs_1) <+ V(cont) * (VAP / D);            //n1, a
       I(vccs_1) <+ V(cont) * -IC;                  //a, p
       I(cccs_1) <+ -I(Rs) * D;                  //n1, p
       V(vcvs_2) <+ V(cccs_1) * D ;                  //n2, p
       V(Rs) <+ I(Rs) * Rc;                        //n3, c
     end
                   
 end

endmodule


and the octave calculations

G0=Vin/(1-D)^2;
G0dB=20*log10(G0)
wz1=1/(RC*C);
fz1=wz1/(2*pi);
wz2=(R0*(1-D)^2 -RL)/L;
fz2=wz2/(2*pi);
w0=(1/(L*C)^(0.5))*( RL/R0 + (1-D)^2)^(0.5);
f0=w0/(2*pi)
Q=w0/(RL/L + 1/(C*(R0+RC)));
Gvd=G0*(1+s/wz1).*(1-s/wz2)./(1+(s/(w0*Q))+((s.^2)/(w0^2)));


The circuit I place the model into is a boost converter (open loop), with V(cont) input being an AC source representing the small signal varience of the duty cycle.


Thank you,
Andrew