Hello,

For testing the effect of supply noise on jitter performance, I typically superpose a sine wave (known amplitude/frequency) on the supply
and perform a transient analysis. The waveform of interest is extracted from the binary output (using a custom MATLAB script) and the deviation between
the ideal and actual zero crossings is determined. Note that depending on the applied frequency, simulation times can blow up!
Typically, for sinusoidal supply noise, the extracted jitter will also exhibit a sinusoidal pattern.

An alternative would be to 'estimate' the supply noise spectrum in the frequency domain, apply an IFFT and superpose this waveform on the supply.

Kind Regards,

Peter

Hi,

I would like to note that a small signal analysis can give a a good first-order estimate, but for circuits like  oscillators - where the 'small signal' assumption does not hold - performing a transient analysis is more accurate. After all, your operating point is changing over time (periodically time-variant).
Furthermore, if the noise on your supply becomes very large (50mV-100mV), the validity of AC simulations is limited for the same reasons.

Kind Regards,

Peter

Hi,

If you include the power regulator with the VCO, then the reported phase noise will indeed incorporate the effect of the supply noise (since you include the devices generating this noise in your setup).
If your oscillator takes e.g. a BGR-based current, make sure to include this one in your SPICE deck too. The biasing is an often neglected source of noise: for a PSS (or PAC) analysis, including the BGR will not increase simulation time too much and will make your phase noise prediction much more realistic.

Kind Regards

Peter

ccd wrote on Oct 5^th, 2006, 4:11pm:


i think its quite possible to have +ve pxf gain, denoting noise on the supply at certain frequencies will be magnified to the VCO output. Examples might be noise on the supply close to the vco frequency could be magnified by the tank Q, or say baseband low freqency noise on the supply could be modulated up to noise at the VCO output depending on how vtune/loopfilter is referenced etc.
Anyway if you're in doubt of your pxf result, you could do a transient, and inject a Vsupply signal tone at a small signal amplitude (1mV?) and see how it impact the VCO output to see if matched what pxf predicts.

cheers
aw

AW,

Thanks for your response.  My vco contains a simple ring oscillator. I haven't tried the transient analysis you suggested yet.  I'm think the 1mV on the power supply will just translate to a small jitter on the vco clock.  I would imagine this jitter is so small that it gets buried in the numerical noise of the simulator. So, I'm not sure if I can find any correlation with pxf doing this transient analysis. Could you please correct me if I'm wrong here?

Thanks,
ccd

Using PSS & PXF can accurately predict the PSSR of oscillators as long as the resulting phase or jitter variation is not an appreciable fraction of a period. If it is smaller than that, PXF gives results much more quickly, accurately, and more easily than using transient. However, you should be careful if the frequency of your interferrer is low or if the interferring signal is large.

This situation is similar to the one with AC analysis. If you perform an AC analysis and find that the gain of you amplifier is 100, and then you turn around and say that if you have a 1V input the amplifier will produce a 100V output, you'd probably be wrong. This does not make AC analysis useless. You just have to know the limits of the analysis. If you apply PXF to an oscillator it is going to compute a series of transfer functions. You can use the transfer functions to predict the response of the circuit as long as the resulting response would not leave the linear range of the circuit. If it does, the response will saturate, just as it would if the input of the amplifier caused the output to reach the supply voltages.

It may be that the overall response due to an interferrer is larger than the noise produced internally by the oscillator, but it may not be in the frequency range of interest. With the interferrer you generally have some control over its frequency, but the same is not true for internally generated noise.

-Ken

Dear ccd,

I've read over the many good responses. I've had the opportunity to simulate the impact of supply noise on many oscillator types. With respect to the ring based VCO, the sensitivity of the design to supply and ground noise is a function of the degree to which the propagation delay is dependent on the supply and ground levels. Since the parameters effecting the propagation delay may not be accurately represented in its small-signal model, as many have stated, the accuracy with which a small-signal analysis estimates the sensitivity of the design to the supply and ground modulation is limited. Hence, I would also recommend the use of large signal simulations to estimate output jitter sensitivity to supply and ground modulation.

As a means of more clearly examining the parameters responsible for the sensitivity, it might be worth examiningthe variation in propagation delay of the basic delay cell of the VCO. You might even start with a set of transient simulations where the DC value of VDD and GND are independently changed and compute the propagation delay time. By plotting the propagation delay as a function of VDD or GND, one may compare the propagation delay sensitivityof different topologies of delay cells. Of course, the freqeuncy of the modulation (and hence its non-DC nature) must still be considered. For example, on chip bypass capacitance will serve to attenuate the modulation on VDD and GND above a specific frequency. Nevertheless, the lower the sensitivity of the propagation delay is to the DC variation of VDD and GND, the more immune it will be as the frequency of the modulation is increased from DC.

Just thought I would add a few pennies to the discussion,

Shawn