I'm actually not that familiar with PA design, but anyway......

Harmonics arise as a result of the gain compression, but do not actually cause gain compression in the desired band unless they pass through a second nonlinear stage (then you get intermodulation).

For example if you input a sine wave and get out a square wave then you now have the fundamental frequency plus a bunch of harmonics. But the gain compression in the desired band is not due to the harmonics, they are a result of the nonlinearity.

As for the nonlinearity, the nonlinearity is basically a result of the gain compression due to the limited supply voltage. It isn't really a result of the transistor's intrinsic gm (where gm is taken assuming an unlimited supply voltage or zero output resistance). For example a MOSFET is ideally only second order nonlinear so there shouldn't be any gain compression in the fundamental frequency. But the gm of the transistor will change according to the limited supply voltage.

If you have an output y=a1x(t) + a2x^2(t) - a3x^3(t)
and you input only a fundamental x(t)=A1cos(wt)
then you will get

y(t) = a1A1cos(wt)-3/4a3A1^2cos(wt)

at the fundamental plus a whole bunch of harmonics. The -3/4 term is the gain compression.

So basically, 1)supply causes gain compression, 2)gain compression changes transistor gm, 3)harmonics are an effect not a cause

Sorry for taking so long...

hi aaron
thanks for the reply...that's exactly my understanding too, that compression is causing harmonics and not the other way around.  one thing though: you said that gm changes because of limited supply voltage, can you explain that? gm is a function of Ic (the dc bias collector current) in BJTs and I don't see why gm would be changing because the bias would ideally remain constant.  but your explanation did confirm what i was thinking.

I agree that both the transistor and the supply contribute to the nonlinearity, but the supply voltage is responsible for the gain compression which cannot be explained by a square law (MOSFET) or exponential law (BJT) model.

As for the changing gm...the gm of a transistor is measured without a load => ideal voltage source so the output never saturates. In the actual design, the output voltage is gm.rout so since Rout is basically constant, it must be gm that is changing at high input levels (that's my thinking but you may want to confirm it elsewhere). Sorry for the confusion...

cheers,
Aaron

I have a side question:

What if gm is still linear at high input level but gmRout > Vdd?  Given a supply limitation, the signal can swing from 0 to 2Vdd (assuming you are using inductive load) or the signal has to be distorted for even higher output power (which means more harmonics).  There are some cases you can swing higher than that (Class D,E or F) using switching mode, which it is not linear.

My understanding is that there are two main types of limiation regarding to linearity, one is output limited, the other is input limited.  For the output limited case, which is determined by Rout (or supply voltage); In contrast, the transistor gm is the dominant factor if it is input limited.