neoflash
Community Fellow
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Mixed-Signal Designer
Posts: 397
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In 130nm cmos process, the supply voltage will be as low as 1.0v ± 10%. So, the worst case supply will be 900mV.
chip's output is differential, CML style signal and AC coupling is used. CML output driver is required to have swing as high as 900mVp-p.
Is that possible to be implemented without additional high supply voltage?
I do not think it is possible, since the output common mode will be as low as "900mV-450mV=450mV". And, when output reach max swing, the low output node will be as low as "225mV". That is too low. Tail device might fall out saturation, or output impedance will be distorted.
What's the real story behind those serdes products?
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