The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Apr 18th, 2024, 4:50pm
Pages: 1
Send Topic Print
Stability Vs pole-zero doublet (Read 76 times)
Jerome
New Member
*
Offline



Posts: 6
Toulouse, France
Stability Vs pole-zero doublet
Jun 22nd, 2006, 8:21am
 
  Hello,

This is my first contribution to this forum...

I am currently working out a compensation network for a voltage regulator. The dominant pole is external (I have no control). In order to reduce the unity gain frequency (while keeping the DC gain constant), I have inserted two pole-zero doublets in the left half plan (it is also called lag filter).
By doing this, I get I very decent phase margin (60deg). On the other hand, the system tends to overshoot (by 10%).
Then, I went through an optimization process. The strange thing is that the phase margin and the overshoot optimization do not lead to the same optimum...
One remark: I have optimized the overshoot with a 10mV => the system operates in its linear region.

Does someone know a reference where it is explained why (LHP) pole-zero doublets create ringing?

Thanks in advance, Jerome.
Back to top
 
 
View Profile   IP Logged
Raul
Community Member
***
Offline



Posts: 37
San Jose, CA.
Re: Stability Vs pole-zero doublet
Reply #1 - Jun 23rd, 2006, 2:25am
 
I've got a simple advice for you: Forget about starting to add zeros and poles to stabilize a voltage regulator. Like you mentioned, you don't control the output, so unless you narrow down the load capacitance value and esr values to impractically small ranges you are going to find a condition where your extra poles and zeros will hurt you and make the system oscillate over process, temp or both.
In LDOs the key is to keep it simple, accept with happiness whatever zero you get from the esr in the load capacitor. It is a pretty difficult AC problem to begin with, adding more AC complexity won't help. If internally compensated, add a Miller cap and that's it. Users of LDO's can get creative, because they are only worried about their application so they can get fancy adding external components that will work for their specific case. Good luck.

Back to top
 
 

regards, Raul Perez
View Profile   IP Logged
Jerome
New Member
*
Offline



Posts: 6
Toulouse, France
Re: Stability Vs pole-zero doublet
Reply #2 - Jun 23rd, 2006, 5:00am
 
 Hi Raul,

Thanks a lot for your advice.

In my case, the value of the capacitance is garanteed (I am doing an ASIC). I have already taped out a version (testchip) with a first order lag filter where I could control very accurately the ratio between the pole and the zero frequencies (I took 3). The lab results were very satisfactory.
Then the customer asked to decrease the output capacitance for the final version. It deteriorates the stability since my dominant pole is external. I realized that I could maintain a good AC open loop characteristic by insterting a second pole-zero doublet. Then, I came to this transient/AC discrepancy (some moderate ringing despite a good AC response).

I made some research through the IEEE publications. This ringing is mentioned in a few JSSC articles but it is never clearly explained...

Thanks, Jerome.
Back to top
 
 
View Profile   IP Logged
sheldon
Community Fellow
*****
Offline



Posts: 751

Re: Stability Vs pole-zero doublet
Reply #3 - Jun 23rd, 2006, 6:12am
 
Jerome,

 Sorry I can't access Xplore right now, but I think one of the two papers
below has the information you are looking for. As I remember there are
some trade-offs in doublet compensation. Large overshoot that settles
faster or less overshoot that takes a long time to settle. The trade-off
between overshoot and settling time has to do with how well the zeroes
compensate the poles. In the real world the compensation is never
perfect. The larger the mismatch, the larger the overshoot and faster
the settling.

Analysis of the settling behavior of an operational amplifier
Chuang, C.T.;
Solid-State Circuits, IEEE Journal of
Volume 17,  Issue 1,  Feb 1982 Page(s):74 - 80

R. J. Apfel and P. R. Gray, “ A fast-settling monolithic operational
amplifier using doublet compression techniques,” IEEE J. Solid-State
Circuits, vol. Sc-9, No.6, pp332-340, Dec. 1974.

Also I think that Raul is right in that for your application, you need to
design your LDO around the capacitor.

                                                            Best Regards,

                                                               Sheldon
Back to top
 
 
View Profile   IP Logged
Jerome
New Member
*
Offline



Posts: 6
Toulouse, France
Re: Stability Vs pole-zero doublet
Reply #4 - Jun 26th, 2006, 6:15am
 
Hello Sheldon,

Thanks a lot for the references!

I have just downloaded them and they seem very relevant...
I will try to see if all of this fits with my observations.

Thanks, Jerome.

Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.