I'm trying to understand the noise shaping of a digital sigma-delta modulator used in our PLL, so that I can use it in the linear noise anaysis.  However, it doesn't seem to be acting the way I think it should.

The modulator we use is all digital.  It dithers the LSB's of the N divider value.  I don't understand how to model that using Ken's method in listing 8 of http://www.designers-guide.org/Analysis/PLLnoise.pdf .  It technically has 0 DC noise (but the N-divider output does have noise, which I think should be modeled separately, since it isn't shaped by the modulator).

I have instead put a subtractor inbetween the VCO and N-divider.  The VCO is on the positive input, and the moduator on the negative input, and the output goes to the N-divider.  The moduator has the noise = 0dB at nyquist/2, and the slope of the noise is that of the order of the moduator.  Does that sound correct?

Perhaps someone could give a good reference on modulators?

Thank you in advance.