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simulation difference between IC5141 and IC5033 (Read 2310 times)
insider
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Fairchild Semi. in South Korea
simulation difference between IC5141 and IC5033
Aug 24th, 2006, 2:42am
 
I got the different simulation results between IC5033 and IC5141 in Spectre simulation
As we know for the kirchhoff's law, the current sum. is zero at a node.
By the way, it's not the law in IC5141 and the current sum. isn't zero at a node.
In IC5033, it tells the law.

I used same netlist and same Spectre models and only ran the different versions of Spectre.
I tried the followings,
- checked Spectre model and found two differences of bsource and mos_method. however, they're not the root causes.
- tighthened tolerance options.
- ran IC5141USR3 and MMSIM version.
- command line running and didn't run in ADE environment.

In circuit, VCC is falling down from 12V to 7V in pulse source and ran transient analysis.

What causes this error?? Please help me.
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Geoffrey_Coram
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Re: simulation difference between IC5141 and IC503
Reply #1 - Aug 24th, 2006, 5:34am
 
In one simulator (don't recall which), the implementation of the HiCUM transistor model was bad, and the terminal current reported was incorrect depending on whether the external base resistance Rbx was zero or not.  Thus, it looked like KCL was violated.

For the node in question, you can:
a) attach 0-V voltage sources between the node and each device terminal, then see which device disagrees with the V-src
b) compute KCL for the device (ic + ib + ie + is = 0)

How bad is the mismatch, compared to the largest magnitude of the terminal currents?

How are you computing the current?  Are you sure you are getting the right terminal currents?  Eg, in a MOS, if you use id_chan for the drain current, you will be missing the diode current as well as the capacitive currents.
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jbdavid
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Silicon Valley
Re: simulation difference between IC5141 and IC503
Reply #2 - Aug 30th, 2006, 1:02am
 
That kind of bug its best to deal directly with Cadence on..
sourcelink.cadence.com
jbd
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jbdavid
Mixed Signal Design Verification
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