Hi,
Pls. take a look at the attached diagram. It is in fact a mixed mode circui which amplified a weak signal and buffer it to a digital CMOS/TTL level. The only descrapancy of two figures are the cascaded amp satge, two stage versus four stage.Except the numbers of stages, all others are same, the amp stage is same,buffer is same and the laod cap is same also.

The transient analysis show that these two topology gave the same output signal, i.e.,the rise/fall time,duty cycles etc...

But I have some concern on the jitter performance, because I did it with transient analysis, I can not evaluate the noise performance. What do you think which one gives the better jitter performance?

My opnion is the Fig.2 would have better jitter performance. That's because , the SNR from Fig.2 at the output from the fourth amp stage is better than that from output of second samp satge of Fig.1.

Pls. comments.
Thanks

This is something that you could use the "jitter" (or "timedomain" - aka "strobed") noise mode of SpectreRF's pnoise analysis to investigate. Of course, if you don't have SpectreRF, you can't  :'(

Regards,

Andrew.