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weak inversion problems (Read 1407 times)
Ronny
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weak inversion problems
Sep 21st, 2006, 12:59pm
 
Hi all,

I'm trying to design a bandgap using MOSFETs in weak inversion. The common equation for weak inversion is Id = Id0 * W/L * (e^(Vgs*q/n*k*T) - 1). My problems are:

1. How is Id0 calculated or where can I get it from? And what about n? Is 1.4 a good value?

2. If I simulate a single MOS in weak inversion with Vgs = 0.25V, Vds = 3.3V, W=100u, L=1u and execute a sweep over the temperature then Id increases with rising temperature (TC = positive)! But the equation above depicts a negative TC! Has anyone an idea?

Thank you for help!
Ronny
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Ronny
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Re: weak inversion problems
Reply #1 - Sep 22nd, 2006, 6:39am
 
for the second problem I found other equations. I think the Vgs should be negative to get a positive temperature coefficient (TC). But Id0 and n are still problems... Maybe anyone has an idea for these two parameters?

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Ronny
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andre75
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Re: weak inversion problems
Reply #2 - Sep 25th, 2006, 11:46am
 
Id0=2*n*u*Cox*UT^2*e^(-VT/(nUT)). Just find the weak inversion paper by Vittoz. Its all there.
As for n, it is technology dependent but also dependent on current levels. I generally use 1.5 for hand calculations and refine the circuits by simulation.
I am not sure why you need all this, since most of it cancels out for calculating the current in the reference.
You will end up with something like this:

VR=UT*ln((ID1*S2)/(ID2*S1)) or VR=n*UT*ln((ID1*S2)/(ID2*S1)) (VR-voltage across reference resistor, S1=W/L of M1, S2=W/L of M2, n-subthreshold slope constant)
The first is valid if you connect the body to substrate (or vdd for PMOS) and the second one if you connect the body to source.

Simply decide how much current you would like to use, calculate the transistor size with an inversion factor of if<=0.1 (Vittoz paper) and use the equation above to set R and S2/S1. You don't need to use the transistor equation, since you don't know all the parameters your calculation will be too far off anyways.

Let me know if you need more info.
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Ronny
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Re: weak inversion problems
Reply #3 - Sep 25th, 2006, 1:28pm
 
Hi Andre,

the output branch of the bandgap includes a pMOS, a resistor and a diode-connected PNP (from vdd to gnd). Now the intention is to calculate Vout over the resistor and the PNP with: Vout = Iout * R + Vpnp where Iout is Id of the pMOS. Vout should be at 1.2 V with a TC < 100 and relatively independent from vdd.
Vg of the pMOS is set to vdd-250mV to ensure weak inversion. The equation for Vout must be derived to find the point where the TC is zero. My problem is that this curve strongly depends from Id0 and the curve doesn't have a point where the TC is near zero, I got very different results for Id0 Sad

The complete bandgap is shown at the pages 12/13 of
http://users.ece.gatech.edu/rincon-mora/classes/ece4430/handouts/l39_bg.pdf
I have no idea what are reasonable values for all W's, L's and the resistors there! And it's also difficult to get a feeling what are feasible performances for this circuit.

Thanks and regards,
Ronny
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andre75
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Re: weak inversion problems
Reply #4 - Sep 25th, 2006, 6:03pm
 
I guess I am even more confused. Its all right there, equations and everything.
If you want to make sure the PMOS are in WI make sure that:

W/L > ID/(2*n*u*Cox*UT^2*if)  if - inversion factor should be around 0.1

The current will be derived as I wrote earlier (last euqation on page 12) which will also be the current in M6 (notice how M6 and M2 form a mirror)
There is no need to dive into the ID(VGS) equation for anything in this circuit (and you shouldn't since its inacurate). All you need to know is IR1=IM6 (or whatever mirror ratio you choose).

Other than that I don't think its a very good circuit anyways. Deriving the current from MOST I would also use a MOST to generate the voltage from it, but thats just me  ::)

You shouldnt "set" the voltage of the MOST in WI and expect any particular current. The Voltage will be "set" by the diode of M2, which in turn will be "set" by the current through R1 which will be "set" by deltaVGS/R1. I am not sure how else to say it. Forget about the voltages for a moment. IM6=X*IR1. X=(W/L)6/(W/L)2
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Ronny
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Re: weak inversion problems
Reply #5 - Sep 26th, 2006, 2:35pm
 
Andre,

unfortunately I'm not a real designer just a beginner Cry but I know what a current mirror is. My question concerns your last equation (seems to be a similar equation as in the slides). Why is there a relation between IM6 and IR1? The X is ok, it is the current mirror between M2 and M6. I verified your equation by simulation and it fails as expected from my side. Can you explain it to me?

Do you have a link or title for the Vittoz paper? I cannot find a paper where the inversion factor is explained. This criteria for weak inversion is new to me since I know that Ugs < Uth and Id < 1uA.

For the output branch of the circuit Id must be 50uA to establish a voltage over Q5 with -2mV/K. Therefore in my opinion M6 cannot be in weak inversion. But I'm not sure  :-/

I think it's quite difficult to choose the W's to get a good TC and a good supply independency.

Ronny

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andre75
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Re: weak inversion problems
Reply #6 - Sep 26th, 2006, 10:58pm
 
No problem. We all start somewhere. Just ask questions  ::)
Unfortunately its late already and I have to get up early tomorrow so my answer will be brief.

Lets assume all transistor sizes are equal for now.
M6 and M2 form a current mirror -> IM6=IM2
M1 and M3 form a current mirror -> IM1=IM3 and hence IM2=IM4 and since IM4=IR1 -> IM6=IR1

Weak Inversion CANNOT simply be classified as ID<1uA. It is actually the current density you should consider. I can have a transistor with 10uA operating in weak inversion by making it very wide and I can have a transistor with 100nA in strong inversion by making it long. (Its easy to see why, when you imagine that 100 transistors in parallel will have 100 times the current, so they can all be in weak inversion, or make that just one large transistor instead  8-))

The defenition of the inversion factor was given in my last reply (just rewrite it for if).

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Re: weak inversion problems
Reply #7 - Sep 27th, 2006, 8:47pm
 
Guys:

Instead of getting mired in the equations, why don't you just run a set of bias curves for the transistors you are using and go from there with geomaetry scaling? Or do it on a simulator?

Remember that a lot of the equations being cited are academic simplifications for the purpose of illustration.

If these transistors could be accurately represented with those equations then, the BSIM 4.5 would not have 230 odd parameters in it. (dont get me started on that issue!)

Jerry
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Ronny
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Re: weak inversion problems
Reply #8 - Sep 28th, 2006, 4:14am
 
Hmm, it seems that a weak inversion current mirror is not a real current mirror. The simulated current ratios fairly differ from the calculated  ones. And the resistances play also an important role to the ratios I think.

@loose_electron:
Yes, I try it on a simulator and I also started parametric analyses to get array of curves. But if I have one specification fulfilled, the next specification fails and so on. I move in a circle at the moment Undecided

What is the way a designer goes if he has to create a new block? Is there one right answer? Does he use the equations from his MOSFET models or does he only estimate the W/L's? And how long does it take for a few transistors?

Regards,
Ronny
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andre75
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Re: weak inversion problems
Reply #9 - Sep 28th, 2006, 7:00pm
 
loose-electron: You don't need bias curves, since you don't care about the Gate Source Voltage on any of the Transistors. When you have a mirror you don't care about the VGS. It changes over process and temperature anyways. It doesn't help you to understand a circuit either. I see this every day. If you understand how it works you can run as many sweeps as you want. I am not sure how hard it is to understand IM6=IR1. The only other equation you need is the inversion factor if you want to determine if the transistor is in WI or not. In simulation you could determine this by looking at gm/Id and find the plateau, but that is not really a simplification. Further the equation for if is amazingly accurate (it only depends on beta and UT). But if you look at the OP, there is clearly a question for ID(VGS) of the MOST in WI.

Ronny: The only reason why a mirror has a mismatch in the currents is a difference in drain source voltages or triode mode operation. One of the mirror transistors has VGS=VDS and the other one has VDD-Vout. So you have to use cascodes and if you have constraints on VDD use low voltage cascodes.
If you neglect mismatch (I don't think you are running monte carlo?), a current mirror will always work, no matter if it is in WI or SI.
The only thing that can make a difference is when one of the transistors goes out of saturation  (in WI a good assumption is VDS>100mV for saturation) or if the VDS are differing a lot.

Forget about the mosfets VGS. It doesn't do anything for you in this circuit.


A good summary on low voltage mirrors can be found here:
http://amesp02.tamu.edu/~sanchez/lvtutorial-2000.pdf

The Vittoz paper I mentioned earlier is titled:
"CMOS analog integrated circuits based on weak inversion opearaton"
Its on the IEEE servers.
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