Hi Yawei,
sqrt(2) improvement makes sense in terms of matching. I was wondering why you mentioned 2^2 earlier,
and hence asked for the reference. I think Rob has clarified this point quite well by explaining how it works.
I have 1 more points on similar lines to suggest:
The matching is important only when looking at the DAC feedback term in the MDAC output
Vout=2^n.Vin - Gdac.Vref
as the Gdac term is the only one which introduces DNL. If you assume a standard MDAC scheme, then
there are 2^n-1 capacitors which comprise Cs, and 1 capacitor which comprises Cf. Now, Gdac is
realized by the combination of multiple unit caps. Hence, the mismatch terms are being combined
and assuming uncorrelated mismatch between the various caps, the overall error can be expected
to go down in a sqrt() fashion. Does this make sense? It is also worth noting that if you are comparing
2 different MDACs with different number of bits resolved in the stage, then you assume that the unit cap
is the same for both in order to get this result.
Regards
Vivek
ywguo wrote on Oct 22nd, 2006, 9:53pm:Hi,
I am sorry that I make a typo in the question.
Quote:It is said that in a pipelined ADC, DNL improves by square of 2 with every extra bit of resolution in the first stages, but why?
It should be DNL improves by square root of 2 with every extra bit of resolution in the first stages.
The reference is Wenhua Yang, et al.,
A 3-V 340-mW 14-b 75-Msample/s CMOS ADC with 85-dB SFDR at Nyquist Input, JSSC, Dec. 2001.
Best regards,
Yawei