Sorry this is a late response,
In a real circuit, one would add charge Into the cap from the Vdd rail, and take it away to ground..
to a spdt switch would connect one throw to a resistor to Vdd, and the other to a resistor to ground,
in a real transistor circuit, you would aways have a LARGE resistance on both branches, in parallel with the low resistance of the switch while its on..
doing this is EASIER in verilog-A (at least for me) than trying to use someone else's library of elements..
doing macro models always required that I translate the spice netlist into a circuit schematic.. (drawing it out on paper)
which always seemed to require half a day to reverse engineer somebody elses MacroModel.. so while the functional lib was great when I first saw it, spectreHDL was even better, and the STANDARD verilog-A was even better yet!
since you are using cadence, you might find the spectre help facility helpful
just run
Code:spectre -help