hello,
i am new to verilog-a and i am trying to write code for NAND gate. can anyone please help me to complete the behvior:

module NAND(in1, in2, out)

inout in1, in2;
output out;
electrical in1, in2, out;

parameter real vlogic_high = 3.5;

      //behvior of NAND GATE (i need help in this part)

endmodule

i know that i should make use of @(cross(V(in1) - thresh, +1)) but i don't know the correct way.

thankyou very much Ken... those are really very helpful examples.....

You can use the gates built-in to verilog when using Verilog-AMS.

But here is a behavioral model for a nand gate in verilog.
Code:

module mynand(in1, in2, out);
    input in1, in2;
    output out;
    assign out = ~(in1 & in2);
endmodule 

-Ken