ACWWong
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Hi eng,
my comments are: 1) Yes, usually you want to reasonate out the load capacitance to provide maximum impedance... this is because the gain in the LNA is proportional to this output load impedance. So in direct answer to your query, No, it is not necessary to tune out all the capacitance, all you want to do is maximise the load and hence gain. Usually in an LNA you want to use as big an L value as you can in the load to maximise the gain. On chip L in 0.18CMOS with a good thick top metal should enable to get >30nH in say 300um^2 with Q of maybe 4 at 400 MHz at a first guess... this is only about 300 ohms if tuned.. you might consider padding the load with well defined MIM cap so that parasitics C's don't dominate any 1/sqrt(LC) reasonce you are looking for. But I would recommend looking at using a load resistor (if you can tolerate IR drop)... say if you used 1k load resistor, you could tolerate 400fF of load C (parsitic drain C, mixer cgs, routing etc.) before you lost 3dB gain, and this would still provide better load than a spiral L & Cload at 400MHz with much less area penalty.
2) To get the simulation right, you need to load the LNA with a representative impedance for the mixer Zin. If the LNA to mixer interface is totally on chip and the mixer input is a gate, then you need to load your LNA output with a capacitor in parallel to a port2 with resistance >> LNA tank impedance (i.e something like 100k). Doing an S11 on the mixer will tell you how to load the LNA. If you were to just slap 50 ohms across the output, you will not get any gain....
cheers aw
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