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ywguo

Community Fellow

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Posts: 943
Shanghai, PRC

RESIZE CONTATS & VIAS
Jan 09^th, 2007, 12:25am

Hi, Guys,

I am transplanting a layout of an analog circuit from one fabrication factory (UMC 0.18um ) to another fabrication factory (TSMC 0.18um ).
The sizes of their contact and vias are different. How can I resize the sizes of the contact and vias of the old process (UMC 0.18um) to the sizes of new process (TSMC 0.18um ) automatically ?

The layout tool is Virtuoso.

BG
Yawei

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bernd

Senior Member

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Posts: 229
Munich/Germany

Re: RESIZE CONTATS & VIAS
Reply #1 - Jan 9^th, 2007, 8:29am

Quote:

I am transplanting a layout of an analog circuit from one fabrication factory (UMC 0.18um ) to another fabrication factory (TSMC 0.18um

How do you do that?
Quote:

The sizes of their contact and vias are different. How can I resize the sizes of the contact and vias of the old process (UMC 0.18um) to the sizes of new process (TSMC 0.18um ) automatically ?
The layout tool is Virtuoso

If you use contacts defined in your technology library as so called
'symbolics' you can dump and edit the technology file of that library
and redefine the contacts to the new size and reload/compile the modified technolgy file to your library.
The tech file section is called 'symContactDevice'.

Bernd

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Just another lonesome cad guy

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ywguo Community Fellow Offline Posts: 943 Shanghai, PRC	Re: RESIZE CONTATS & VIAS Reply #2 - Jan 10^th, 2007, 5:50pm Bernd, We have an ADC design silicon-provened using UMC 0.18um technology. Now we need target it to TSMC 0.18um technology. Sure the simulation is done. Your suggestion is great. It works well. Thank you. Yawei
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ywguo Community Fellow Offline Posts: 943 Shanghai, PRC	Re: RESIZE CONTATS & VIAS Reply #3 - Jan 15^th, 2007, 1:17am I found some contacts in the transistors that instantiated from the PDK. They were not resized when I modifiied the technology file as Bernd said. Can I modifiy the technology file and resize the contact in those transistors? Thanks Yawei
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haikom Junior Member Offline Posts: 17 Germany	Re: RESIZE CONTATS & VIAS Reply #4 - Mar 24^th, 2007, 1:57pm Hi, I'm not 100% sure, but I think the vias in the device are defined inside the pcell definition, isn't ist? If yes, you have to modify the pcell source code. Regards, haikom
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