First off, I'm not sure what you call "AC source" is sinusoidal!
analogLib has pure sine wave sources vsin or vsource or even exponential sources vexp

There's also a vsffm source; don't know if it can be used for your purpose.

For such custom voltage sources, i guess we need to write ahdl/veriloga code to create a block that takes in arbitrary functions for amplitude and frequency

-Gau

topquark and Frank Wiedmann,  

thank you for your replies.

Using calculator is not a good method for my case, because I need an AC source, not manipulated simulation result.

I have tried to use verilog-A to model it, but the results are strange. Following is a simple verilog-A model, just for test.

module ac_src(freq, out);
  input freq;
  output out;
  electrical freq, out;
  real varOut;
  analog begin
     varOut = V(freq);
     V(out) <+ ac_stim("ac", varOut);
  end
endmodule

In above model, freq is a input pin whose value is proportional to simulation frequency.

The simulation results alway show

mag(VF("/out")) = 0
phase(VF("/out")) = 0

what's wrong with my model?