ywguo
|
Hi, jay,
I designed a LDO w/o external cap for a small digital circuit and an EEPROM. The simulation proved large transient ripples when the loading (digital circuit) were operating.
I think the first problem is to model the transient current supply of a 10K gates digital circuit.
The second problem is a circuit topology. The conventional topology often needs very huge external cap.
Best regards, Yawei
|