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Phase noise simulation of divider and PFD
Feb 02^nd, 2007, 11:56pm

Hi all,

I am a new student working on simulation of phase noise of PLL. Currently I am working on simulation of frequency divider and PFD. However, I don't know why I can't get correct simulation result of phase noise. I got corect result for VCO.

I know for VCO, during my simulation in Pnoise, I can choose Oscillator. However, for divider and PFD, I can't do that. Can anyone tell me how to setup the phase noise simulation for divider and PFD? I can't find information from spectreRF user manual as it only describes simulation of VCO.

Thank,
Paul

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seho

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Re: Phase noise simulation of divider and PFD
Reply #1 - Feb 5^th, 2007, 12:32pm

Hi Paul,

the simulation of phase noise of dividers and PFD/CP is described in Ken's paper:

http://www.designers-guide.org/Analysis/PLLnoise+jitter.pdf

To simulate the divider phase noise drive the divider with a clock signal and use pss and pnoise to get the phase noise. The beat frequency is the output frequency of the divider.

I'm not sure how to simulate the phase noise of the PFD directly, because it commonly has two outputs (up and down). In my work I simulate the output current noise of the PFD/CP combination with pss and pnoise analysis. The PFD is driven with clock signals with a phase difference, that the cp is switching. The cp current noise is converted to voltage noise by the loop filter impedance and this voltage noise generates phase noise at pll output by modulating the vco.

Kind Regards

Sebastian

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paulcktang

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Re: Phase noise simulation of divider and PFD
Reply #2 - Feb 5^th, 2007, 1:48pm

Thanks. However, but what I got from the phase noise plot of divider is totally not consistent with what Ken expected in his paper. I am sure this is wrong. How do you setup the pnoise?

In my case, there are four opinions in setting up pnoise: Jitter, timedomain, source and modulation. Which one should I choose for the divider?

I appreciate your help!

Thanks!

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seho New Member Offline Posts: 4	Re: Phase noise simulation of divider and PFD Reply #3 - Feb 6^th, 2007, 2:39am Hi, To get the output phase noise of the divider, I used in PNOISE analysis the settings sweeptype relative relative harmonic 1 noise type sources The phase noise can be plotted in the analog design environment results > direct plot > main form > pnoise > phase noise Good Luck Sebastian
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Lance

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Re: Phase noise simulation of divider and PFD
Reply #4 - Apr 18^th, 2007, 4:20am

I'm going through the same painful process of selecting the correct PNoise method (sources, modulated, timedomain etc) for divider phase noise measurement and having read Ken's papers and discussions with cadence it seems that the timedomain strobed method is the only correct method as the phase frequency detector is only concerned with the instantaneous noise from a divider edge as nothing else in the cycle can possibly contribute to phase noise and the sources or modulated method time average the PSS interval!

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Lance

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Re: Phase noise simulation of divider and PFD
Reply #5 - May 16^th, 2007, 2:29am

To add further to this thread. I'm designing dividers and wanted to know the difference between the different Cadence phase noise measurement methods; sources, modulated and time domain. As I said in my previous mail that I beleived the time domain strobed method to be the correct one for dividers as the following PFD only cares about the clocking edge from the divider and ignores noise elsewhere in the PSS cycle. I did an experiment with a string of inverters driven with a square wave and measured the phase noise with the 3 methods just mentioned. I found that the modulated PM phase noise was identical to the sources Phase noise but the strobed phase noise was 6dB worse than the other 2. As i believe the strobed method to be the correct method then beware of using the other 2 methods for their results are optimistic.

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