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The Designer's Guide Community Forum › Design › Mixed-Signal Design › S/H droop

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S/H droop (Read 776 times)

Croaker Senior Member Offline Posts: 235	S/H droop Feb 05^th, 2007, 5:45am The capacitor voltage droops due to Ioff of the switch, the reverse-biased drain diode of the switch, and substrate current. I'm not seeing how substrate current comes into play.
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dkace New Member Offline Posts: 1	Re: S/H droop Reply #1 - Feb 13^th, 2007, 1:10am What if substrate current results on a lower Id and therefore a voltage drop across the switch, which eventually is presented as a voltage drop on the capacitor controled by this switch? What I am saying is that this is not adirect effect of the capacitor charge rather than on the MOST itself. What do you think? D.
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Croaker Senior Member Offline Posts: 235	Re: S/H droop Reply #2 - Feb 13^th, 2007, 7:56am I don't know. Hmm, I'm sure if I scrounge through my library I can find an explanation. Usually you need a few books on each subject to cover all the gaps one author creates.
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