aaron_do
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If we use source degeneration for linearization, the degen resistor can vary by up to 50% if it is on chip. So how do we deal with the huge change in circuit performance?
If i'm using a differential structure where the tail current is biased by a bandgap, I don't need to worry much about DC current variation, but obviouly there will be huge changes in gm, IIP3, and NF with resistor size.
thanks, Aaron
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