Hello All,

Iam simulating schematic level simulations of phaselocked loops. I run PSS and Pnoise to generate the phaseNoise plot. Regardless of what type of PLL i design i get a phase noise slope of -10dBc/hz per decade but its suppose to be -20dBc/Hz per decade. I am pretty sure its not a circuit issume but a simulator problem. Will incorrect settings result in the wrong profile of the phase noise ? anyone run into this issue before ?

Hi ken,

can you pls tell me how to look at the  noise contributors summary?

I could not find the menu in spectre RF.

Thanks
SavithRu