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Phase Noise and Jitter Measurements
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PLL Simulation (Read 4357 times)
karachite
New Member
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Posts: 2
PLL Simulation
Feb 14
th
, 2007, 9:21pm
i am planning to design a PLL. i dont have access to RF spectre type of advanced simulation softwares. now how can i estimate the noise contributions of VCO, divider, and phase detector. i have access to ORCAD schematic capture and pspice simulator.
i am wondering how PLL's were design before the advent of advanced simulation softwres.
this website is wonderful.
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Visjnoe
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Posts: 233
Re: PLL Simulation
Reply #1 -
Feb 15
th
, 2007, 11:33am
Dear Karachite,
I think you can only simulate PLL functionality (e.g. locking) given your tool set.
To evaluate phase noise, try to find some equations for the phase noise of your VCO and CP, as these will be the major contributors to the overall phase noise.
Kind Regards
Peter
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fonseca.ha
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Posts: 28
UK
Re: PLL Simulation
Reply #2 -
Mar 7
th
, 2007, 9:49am
Hi
I agree with the above. The resistor in the loop filter may also play an important role in phase noise, depending on VCO gain, bandwidth and area of your design,
REgards,
Humberto
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DaveB
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Posts: 15
Re: PLL Simulation
Reply #3 -
Mar 8
th
, 2007, 4:29pm
If you have Excel, I have a spreadsheet that might take care of some of your requirements. You can download it at
http://www.keystoneradio.com/?n=Main.PLLDesign
I've used some VBA, so you might get a security alert when you run it.
Dave
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